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authorHaavard Skinnemoen <hskinnemoen@atmel.com>2007-02-01 16:34:10 +0100
committerHaavard Skinnemoen <hskinnemoen@atmel.com>2007-04-27 12:58:50 +0200
commit9c8f8e752431f3f7ed6ea6ea6e491ce12057f572 (patch)
tree0ec81e8d5cd6239b8cd47990e7ae78e183b01a4f /arch/avr32/mach-at32ap/at32ap7000.c
parentde46c33745f5e2ad594c72f2cf5f490861b16ce1 (diff)
downloadop-kernel-dev-9c8f8e752431f3f7ed6ea6ea6e491ce12057f572.zip
op-kernel-dev-9c8f8e752431f3f7ed6ea6ea6e491ce12057f572.tar.gz
[AVR32] Add basic HMATRIX support
This adds register and clock definitions for the High-speed bus Matrix (HMATRIX) as well as a function that can be used to configure special EBI functionality like CompactFlash and NAND flash support. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Diffstat (limited to 'arch/avr32/mach-at32ap/at32ap7000.c')
-rw-r--r--arch/avr32/mach-at32ap/at32ap7000.c38
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/avr32/mach-at32ap/at32ap7000.c b/arch/avr32/mach-at32ap/at32ap7000.c
index 472703f..32c7045 100644
--- a/arch/avr32/mach-at32ap/at32ap7000.c
+++ b/arch/avr32/mach-at32ap/at32ap7000.c
@@ -18,6 +18,7 @@
#include <asm/arch/sm.h>
#include "clock.h"
+#include "hmatrix.h"
#include "pio.h"
#include "sm.h"
@@ -467,6 +468,42 @@ static struct clk pico_clk = {
};
/* --------------------------------------------------------------------
+ * HMATRIX
+ * -------------------------------------------------------------------- */
+
+static struct clk hmatrix_clk = {
+ .name = "hmatrix_clk",
+ .parent = &pbb_clk,
+ .mode = pbb_clk_mode,
+ .get_rate = pbb_clk_get_rate,
+ .index = 2,
+ .users = 1,
+};
+#define HMATRIX_BASE ((void __iomem *)0xfff00800)
+
+#define hmatrix_readl(reg) \
+ __raw_readl((HMATRIX_BASE) + HMATRIX_##reg)
+#define hmatrix_writel(reg,value) \
+ __raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg)
+
+/*
+ * Set bits in the HMATRIX Special Function Register (SFR) used by the
+ * External Bus Interface (EBI). This can be used to enable special
+ * features like CompactFlash support, NAND Flash support, etc. on
+ * certain chipselects.
+ */
+static inline void set_ebi_sfr_bits(u32 mask)
+{
+ u32 sfr;
+
+ clk_enable(&hmatrix_clk);
+ sfr = hmatrix_readl(SFR4);
+ sfr |= mask;
+ hmatrix_writel(SFR4, sfr);
+ clk_disable(&hmatrix_clk);
+}
+
+/* --------------------------------------------------------------------
* PIO
* -------------------------------------------------------------------- */
@@ -950,6 +987,7 @@ struct clk *at32_clock_list[] = {
&pbb_clk,
&at32_sm_pclk,
&at32_intc0_pclk,
+ &hmatrix_clk,
&ebi_clk,
&hramc_clk,
&smc0_pclk,
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