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| author | Jisheng Zhang <jszhang@marvell.com> | 2015-12-07 21:09:25 +0800 |
|---|---|---|
| committer | Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> | 2015-12-10 21:00:24 +0100 |
| commit | b5010d2081331e1c95358c4eb500bd30f5d532ce (patch) | |
| tree | 388f19a5838b01d243edee9b70379cb4da816679 /arch/arm | |
| parent | 5d756147f7d356c3e85372373a0054dcf25a370e (diff) | |
| download | op-kernel-dev-b5010d2081331e1c95358c4eb500bd30f5d532ce.zip op-kernel-dev-b5010d2081331e1c95358c4eb500bd30f5d532ce.tar.gz | |
ARM: dts: berlin: add 2nd clock for BG2Q sdhci0 and sdhci1
We removed CLK_IGNORE_UNUSED from CLKID_SDIO's flag, so the sdhci0 and
sdhci1 don't work. We fix this by adding the optional 2nd clock for
BG2Q's sdhci0 and sdhci1. This patch brings another benefit: the 2nd
clock can be disabled during runtime pm, so saves power a bit.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/berlin2q.dtsi | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi index 5b10129..fb1da99 100644 --- a/arch/arm/boot/dts/berlin2q.dtsi +++ b/arch/arm/boot/dts/berlin2q.dtsi @@ -118,7 +118,8 @@ sdhci0: sdhci@ab0000 { compatible = "mrvl,pxav3-mmc"; reg = <0xab0000 0x200>; - clocks = <&chip_clk CLKID_SDIO1XIN>; + clocks = <&chip_clk CLKID_SDIO1XIN>, <&chip_clk CLKID_SDIO>; + clock-names = "io", "core"; interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; @@ -126,7 +127,8 @@ sdhci1: sdhci@ab0800 { compatible = "mrvl,pxav3-mmc"; reg = <0xab0800 0x200>; - clocks = <&chip_clk CLKID_SDIO1XIN>; + clocks = <&chip_clk CLKID_SDIO1XIN>, <&chip_clk CLKID_SDIO>; + clock-names = "io", "core"; interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; |
