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author | Kevin Hilman <khilman@linaro.org> | 2013-08-22 08:10:52 -0700 |
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committer | Kevin Hilman <khilman@linaro.org> | 2013-08-22 08:11:41 -0700 |
commit | 8a75f0a07c7aa1e4454c077042ab2b56b72299b9 (patch) | |
tree | 3dc4153b8abb78e324168f46a47d5df99d1b1ec3 /arch/arm | |
parent | 30f9c3bdcec9c810f5bd05b177367c7eeab24d90 (diff) | |
parent | 8c3736e20ee387acefffdfcac560ea23ee6fd4d8 (diff) | |
download | op-kernel-dev-8a75f0a07c7aa1e4454c077042ab2b56b72299b9.zip op-kernel-dev-8a75f0a07c7aa1e4454c077042ab2b56b72299b9.tar.gz |
Merge tag 'samsung-cleanup-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup
From Kukjin Kim:
samsung cleanup for v3.12
- cleanup non-dt stuff in exynos
- remove 0x from exynos dt files
- remove unused codes
* tag 'samsung-cleanup-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: SAMSUNG: Remove unnecessary exynos4_default_sdhci*()
ARM: dts: Remove '0x's from Exynos5440 DTS file
ARM: dts: Remove '0x's from Exynos5420 DTS file
ARM: dts: Remove '0x's from Exynos5250 DTS file
ARM: dts: Remove '0x's from Exynos4x12 DTSI file
ARM: dts: Remove '0x's from Exynos4210 DTSI file
ARM: EXYNOS: Cleanup common.h file
irqchip: exynos: cleanup non-DT stuff in exynos-combiner
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/boot/dts/exynos4210.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/boot/dts/exynos4x12.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/boot/dts/exynos5250.dtsi | 14 | ||||
-rw-r--r-- | arch/arm/boot/dts/exynos5420.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/boot/dts/exynos5440.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/mach-exynos/common.h | 43 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/sdhci.h | 38 |
7 files changed, 11 insertions, 92 deletions
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index b7f358a..53e2527 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -72,7 +72,7 @@ }; }; - clock: clock-controller@0x10030000 { + clock: clock-controller@10030000 { compatible = "samsung,exynos4210-clock"; reg = <0x10030000 0x20000>; #clock-cells = <1>; diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi index 01da194..3aa2f06 100644 --- a/arch/arm/boot/dts/exynos4x12.dtsi +++ b/arch/arm/boot/dts/exynos4x12.dtsi @@ -28,7 +28,7 @@ pinctrl3 = &pinctrl_3; }; - clock: clock-controller@0x10030000 { + clock: clock-controller@10030000 { compatible = "samsung,exynos4412-clock"; reg = <0x10030000 0x20000>; #clock-cells = <1>; diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index ef57277..24c0888 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -68,17 +68,17 @@ }; }; - pd_gsc: gsc-power-domain@0x10044000 { + pd_gsc: gsc-power-domain@10044000 { compatible = "samsung,exynos4210-pd"; reg = <0x10044000 0x20>; }; - pd_mfc: mfc-power-domain@0x10044040 { + pd_mfc: mfc-power-domain@10044040 { compatible = "samsung,exynos4210-pd"; reg = <0x10044040 0x20>; }; - clock: clock-controller@0x10010000 { + clock: clock-controller@10010000 { compatible = "samsung,exynos5250-clock"; reg = <0x10010000 0x30000>; #clock-cells = <1>; @@ -562,7 +562,7 @@ }; }; - gsc_0: gsc@0x13e00000 { + gsc_0: gsc@13e00000 { compatible = "samsung,exynos5-gsc"; reg = <0x13e00000 0x1000>; interrupts = <0 85 0>; @@ -571,7 +571,7 @@ clock-names = "gscl"; }; - gsc_1: gsc@0x13e10000 { + gsc_1: gsc@13e10000 { compatible = "samsung,exynos5-gsc"; reg = <0x13e10000 0x1000>; interrupts = <0 86 0>; @@ -580,7 +580,7 @@ clock-names = "gscl"; }; - gsc_2: gsc@0x13e20000 { + gsc_2: gsc@13e20000 { compatible = "samsung,exynos5-gsc"; reg = <0x13e20000 0x1000>; interrupts = <0 87 0>; @@ -589,7 +589,7 @@ clock-names = "gscl"; }; - gsc_3: gsc@0x13e30000 { + gsc_3: gsc@13e30000 { compatible = "samsung,exynos5-gsc"; reg = <0x13e30000 0x1000>; interrupts = <0 88 0>; diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 8c54c4b..9e90d1e 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -59,7 +59,7 @@ }; }; - clock: clock-controller@0x10010000 { + clock: clock-controller@10010000 { compatible = "samsung,exynos5420-clock"; reg = <0x10010000 0x30000>; #clock-cells = <1>; diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi index ff7f5d8..0cedba4 100644 --- a/arch/arm/boot/dts/exynos5440.dtsi +++ b/arch/arm/boot/dts/exynos5440.dtsi @@ -20,7 +20,7 @@ spi0 = &spi_0; }; - clock: clock-controller@0x160000 { + clock: clock-controller@160000 { compatible = "samsung,exynos5440-clock"; reg = <0x160000 0x1000>; #clock-cells = <1>; diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h index 972490f..8646a14 100644 --- a/arch/arm/mach-exynos/common.h +++ b/arch/arm/mach-exynos/common.h @@ -17,7 +17,6 @@ void mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1); void exynos_init_time(void); -extern unsigned long xxti_f, xusbxti_f; struct map_desc; void exynos_init_io(void); @@ -25,56 +24,14 @@ void exynos4_restart(enum reboot_mode mode, const char *cmd); void exynos5_restart(enum reboot_mode mode, const char *cmd); void exynos_init_late(void); -/* ToDo: remove these after migrating legacy exynos4 platforms to dt */ -void exynos4_clk_init(struct device_node *np, int is_exynos4210, void __iomem *reg_base, unsigned long xom); -void exynos4_clk_register_fixed_ext(unsigned long, unsigned long); - void exynos_firmware_init(void); -void exynos_set_timer_source(u8 channels); - #ifdef CONFIG_PM_GENERIC_DOMAINS int exynos_pm_late_initcall(void); #else static inline int exynos_pm_late_initcall(void) { return 0; } #endif -#ifdef CONFIG_ARCH_EXYNOS4 -void exynos4_register_clocks(void); -void exynos4_setup_clocks(void); - -#else -#define exynos4_register_clocks() -#define exynos4_setup_clocks() -#endif - -#ifdef CONFIG_ARCH_EXYNOS5 -void exynos5_register_clocks(void); -void exynos5_setup_clocks(void); - -#else -#define exynos5_register_clocks() -#define exynos5_setup_clocks() -#endif - -#ifdef CONFIG_CPU_EXYNOS4210 -void exynos4210_register_clocks(void); - -#else -#define exynos4210_register_clocks() -#endif - -#ifdef CONFIG_SOC_EXYNOS4212 -void exynos4212_register_clocks(void); - -#else -#define exynos4212_register_clocks() -#endif - -struct device_node; -void combiner_init(void __iomem *combiner_base, struct device_node *np, - unsigned int max_nr, int irq_base); - extern struct smp_operations exynos_smp_ops; extern void exynos_cpu_die(unsigned int cpu); diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h index ce1d0f7..bf65021 100644 --- a/arch/arm/plat-samsung/include/plat/sdhci.h +++ b/arch/arm/plat-samsung/include/plat/sdhci.h @@ -260,44 +260,6 @@ static inline void s5pv210_default_sdhci3(void) { } #endif /* CONFIG_S5PV210_SETUP_SDHCI */ -/* EXYNOS4 SDHCI setup */ -#ifdef CONFIG_EXYNOS4_SETUP_SDHCI -static inline void exynos4_default_sdhci0(void) -{ -#ifdef CONFIG_S3C_DEV_HSMMC - s3c_hsmmc0_def_platdata.cfg_gpio = exynos4_setup_sdhci0_cfg_gpio; -#endif -} - -static inline void exynos4_default_sdhci1(void) -{ -#ifdef CONFIG_S3C_DEV_HSMMC1 - s3c_hsmmc1_def_platdata.cfg_gpio = exynos4_setup_sdhci1_cfg_gpio; -#endif -} - -static inline void exynos4_default_sdhci2(void) -{ -#ifdef CONFIG_S3C_DEV_HSMMC2 - s3c_hsmmc2_def_platdata.cfg_gpio = exynos4_setup_sdhci2_cfg_gpio; -#endif -} - -static inline void exynos4_default_sdhci3(void) -{ -#ifdef CONFIG_S3C_DEV_HSMMC3 - s3c_hsmmc3_def_platdata.cfg_gpio = exynos4_setup_sdhci3_cfg_gpio; -#endif -} - -#else -static inline void exynos4_default_sdhci0(void) { } -static inline void exynos4_default_sdhci1(void) { } -static inline void exynos4_default_sdhci2(void) { } -static inline void exynos4_default_sdhci3(void) { } - -#endif /* CONFIG_EXYNOS4_SETUP_SDHCI */ - static inline void s3c_sdhci_setname(int id, char *name) { switch (id) { |