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author | Roland Stigge <stigge@antcom.de> | 2012-06-14 16:16:17 +0200 |
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committer | Roland Stigge <stigge@antcom.de> | 2012-06-14 16:16:17 +0200 |
commit | d807af4793a464f7331f92461a619e5e7ddf9089 (patch) | |
tree | d0ec9ece7bad3a47ba725091c5c03bd740d4a16b /arch/arm | |
parent | ba225a0ea225902501487a2c9f620c26dce1cee6 (diff) | |
download | op-kernel-dev-d807af4793a464f7331f92461a619e5e7ddf9089.zip op-kernel-dev-d807af4793a464f7331f92461a619e5e7ddf9089.tar.gz |
ARM: LPC32xx: Add DMA configuration to platform data
This patch adds DMA channel configuration to the LPC32xx platform file. The
configured DMA signalling is generic for LPC32xx SoC and is not board specific.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-lpc32xx/phy3250.c | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c index 42a078e..eade77f 100644 --- a/arch/arm/mach-lpc32xx/phy3250.c +++ b/arch/arm/mach-lpc32xx/phy3250.c @@ -226,7 +226,38 @@ static int __init phy3250_spi_board_register(void) } arch_initcall(phy3250_spi_board_register); +static struct pl08x_channel_data pl08x_slave_channels[] = { + { + .bus_id = "nand-slc", + .min_signal = 1, /* SLC NAND Flash */ + .max_signal = 1, + .periph_buses = PL08X_AHB1, + }, + { + .bus_id = "nand-mlc", + .min_signal = 12, /* MLC NAND Flash */ + .max_signal = 12, + .periph_buses = PL08X_AHB1, + }, +}; + +/* NOTE: These will change, according to RMK */ +static int pl08x_get_signal(struct pl08x_dma_chan *ch) +{ + return ch->cd->min_signal; +} + +static void pl08x_put_signal(struct pl08x_dma_chan *ch) +{ +} + static struct pl08x_platform_data pl08x_pd = { + .slave_channels = &pl08x_slave_channels[0], + .num_slave_channels = ARRAY_SIZE(pl08x_slave_channels), + .get_signal = pl08x_get_signal, + .put_signal = pl08x_put_signal, + .lli_buses = PL08X_AHB1, + .mem_buses = PL08X_AHB1, }; static const struct of_dev_auxdata lpc32xx_auxdata_lookup[] __initconst = { |