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authorYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>2015-05-26 20:13:43 +0900
committerFelipe Balbi <balbi@ti.com>2015-05-26 10:21:53 -0500
commit93fb9127cb63a3246b32d48fa273010764687862 (patch)
tree5fee26d03eeba0683b43a9a5a2c048f2bb4223d5 /arch/arm
parente73d42f15f90614538edeb5d4102f847105f86f2 (diff)
downloadop-kernel-dev-93fb9127cb63a3246b32d48fa273010764687862.zip
op-kernel-dev-93fb9127cb63a3246b32d48fa273010764687862.tar.gz
usb: renesas_usbhs: Don't disable the pipe if Control write status stage
This patch fixes an issue that sometimes this controller is not able to complete the Control write status stage. This driver should enable DCPCTR.CCPL and PID_BUF to complete the status stage. However, if this driver detects the ctrl_stage interruption first before the control write data is received, this driver will clear the PID_BUF wrongly in the usbhsf_pio_try_pop(). To avoid this issue, this patch doesn't clear the PID_BUF in the usbhsf_pio_try_pop(). (Since also the privious code doesn't disable the PID_BUF after a control transfer was finished, this patch doesn't have any side efforts.) Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
Diffstat (limited to 'arch/arm')
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