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authorThomas Abraham <thomas.abraham@linaro.org>2012-04-20 17:26:23 -0700
committerKukjin Kim <kgene.kim@samsung.com>2012-04-20 17:53:14 -0700
commit5699b0ca05f781d496d20ba87f916bd9eec7ea6a (patch)
treee4fe70a61d192f41482e5ec8580ed8b0e5eb8138 /arch/arm
parent8482c81c770960d7c0dc991a781cbd4afa7ea4cc (diff)
downloadop-kernel-dev-5699b0ca05f781d496d20ba87f916bd9eec7ea6a.zip
op-kernel-dev-5699b0ca05f781d496d20ba87f916bd9eec7ea6a.tar.gz
ARM: EXYNOS: Fix incorrect initialization of GIC
Use the of_irq_init() call to setup the gic which also properly registers the gic device node pointer with gic irq domain, without which all interrupt specifier translations for gic fail. Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-exynos/common.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index b5e7f00..6c0e4f5 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -547,7 +547,7 @@ void __init exynos5_init_irq(void)
{
int irq;
- gic_init(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU);
+ of_irq_init(exynos4_dt_irq_match);
for (irq = 0; irq < EXYNOS5_MAX_COMBINER_NR; irq++) {
combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq),
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