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authorJames Bottomley <jejb@mulgrave.il.steeleye.com>2006-03-14 14:18:01 -0600
committerJames Bottomley <jejb@mulgrave.il.steeleye.com>2006-03-14 14:18:01 -0600
commitf33b5d783b4f56be5ace6a1c98fb5f76b2d2d07d (patch)
treeb027b5f3429d416b3da5b9195024007dab062a5e /arch/arm
parente935d5da8e5d12fabe5b632736c50eae0427e8c8 (diff)
parent67963132638e67ad3c5aa16765e6f3f2f3cdd85c (diff)
downloadop-kernel-dev-f33b5d783b4f56be5ace6a1c98fb5f76b2d2d07d.zip
op-kernel-dev-f33b5d783b4f56be5ace6a1c98fb5f76b2d2d07d.tar.gz
Merge ../linux-2.6
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Kconfig4
-rw-r--r--arch/arm/kernel/asm-offsets.c4
-rw-r--r--arch/arm/kernel/ptrace.c14
-rw-r--r--arch/arm/kernel/time.c10
-rw-r--r--arch/arm/lib/muldi3.S4
-rw-r--r--arch/arm/mach-ixp4xx/Kconfig4
-rw-r--r--arch/arm/mach-ixp4xx/nas100d-power.c3
-rw-r--r--arch/arm/mach-ixp4xx/nas100d-setup.c3
-rw-r--r--arch/arm/mm/cache-v6.S7
-rw-r--r--arch/arm/mm/flush.c6
-rw-r--r--arch/arm/mm/tlb-v6.S1
11 files changed, 34 insertions, 26 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 15dc1a0..32ba00b 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -78,7 +78,7 @@ menu "System Type"
choice
prompt "ARM system type"
- default ARCH_RPC
+ default ARCH_VERSATILE
config ARCH_CLPS7500
bool "Cirrus-CL-PS7500FE"
@@ -799,6 +799,8 @@ source "drivers/i2c/Kconfig"
source "drivers/spi/Kconfig"
+source "drivers/w1/Kconfig"
+
source "drivers/hwmon/Kconfig"
#source "drivers/l3/Kconfig"
diff --git a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c
index 0abbce8..b324dca 100644
--- a/arch/arm/kernel/asm-offsets.c
+++ b/arch/arm/kernel/asm-offsets.c
@@ -57,7 +57,9 @@ int main(void)
DEFINE(TI_TP_VALUE, offsetof(struct thread_info, tp_value));
DEFINE(TI_FPSTATE, offsetof(struct thread_info, fpstate));
DEFINE(TI_VFPSTATE, offsetof(struct thread_info, vfpstate));
- DEFINE(TI_IWMMXT_STATE, (offsetof(struct thread_info, fpstate)+4)&~7);
+#ifdef CONFIG_IWMMXT
+ DEFINE(TI_IWMMXT_STATE, offsetof(struct thread_info, fpstate.iwmmxt));
+#endif
BLANK();
DEFINE(S_R0, offsetof(struct pt_regs, ARM_r0));
DEFINE(S_R1, offsetof(struct pt_regs, ARM_r1));
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index 7b6256b..bc9e2f8 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -610,15 +610,12 @@ static int ptrace_setfpregs(struct task_struct *tsk, void __user *ufp)
static int ptrace_getwmmxregs(struct task_struct *tsk, void __user *ufp)
{
struct thread_info *thread = task_thread_info(tsk);
- void *ptr = &thread->fpstate;
if (!test_ti_thread_flag(thread, TIF_USING_IWMMXT))
return -ENODATA;
iwmmxt_task_disable(thread); /* force it to ram */
- /* The iWMMXt state is stored doubleword-aligned. */
- if (((long) ptr) & 4)
- ptr += 4;
- return copy_to_user(ufp, ptr, 0x98) ? -EFAULT : 0;
+ return copy_to_user(ufp, &thread->fpstate.iwmmxt, IWMMXT_SIZE)
+ ? -EFAULT : 0;
}
/*
@@ -627,15 +624,12 @@ static int ptrace_getwmmxregs(struct task_struct *tsk, void __user *ufp)
static int ptrace_setwmmxregs(struct task_struct *tsk, void __user *ufp)
{
struct thread_info *thread = task_thread_info(tsk);
- void *ptr = &thread->fpstate;
if (!test_ti_thread_flag(thread, TIF_USING_IWMMXT))
return -EACCES;
iwmmxt_task_release(thread); /* force a reload */
- /* The iWMMXt state is stored doubleword-aligned. */
- if (((long) ptr) & 4)
- ptr += 4;
- return copy_from_user(ptr, ufp, 0x98) ? -EFAULT : 0;
+ return copy_from_user(&thead->fpstate.iwmmxt, ufp, IWMMXT_SIZE)
+ ? -EFAULT : 0;
}
#endif
diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c
index d7d932c..d6bd435 100644
--- a/arch/arm/kernel/time.c
+++ b/arch/arm/kernel/time.c
@@ -422,12 +422,14 @@ static int timer_dyn_tick_disable(void)
void timer_dyn_reprogram(void)
{
struct dyn_tick_timer *dyn_tick = system_timer->dyn_tick;
+ unsigned long next, seq;
- if (dyn_tick) {
- write_seqlock(&xtime_lock);
- if (dyn_tick->state & DYN_TICK_ENABLED)
+ if (dyn_tick && (dyn_tick->state & DYN_TICK_ENABLED)) {
+ next = next_timer_interrupt();
+ do {
+ seq = read_seqbegin(&xtime_lock);
dyn_tick->reprogram(next_timer_interrupt() - jiffies);
- write_sequnlock(&xtime_lock);
+ } while (read_seqretry(&xtime_lock, seq));
}
}
diff --git a/arch/arm/lib/muldi3.S b/arch/arm/lib/muldi3.S
index 72d5941..d89c606 100644
--- a/arch/arm/lib/muldi3.S
+++ b/arch/arm/lib/muldi3.S
@@ -29,8 +29,8 @@ ENTRY(__aeabi_lmul)
mul xh, yl, xh
mla xh, xl, yh, xh
- mov ip, xl, asr #16
- mov yh, yl, asr #16
+ mov ip, xl, lsr #16
+ mov yh, yl, lsr #16
bic xl, xl, ip, lsl #16
bic yl, yl, yh, lsl #16
mla xh, yh, ip, xh
diff --git a/arch/arm/mach-ixp4xx/Kconfig b/arch/arm/mach-ixp4xx/Kconfig
index daadc78..5bf50a2 100644
--- a/arch/arm/mach-ixp4xx/Kconfig
+++ b/arch/arm/mach-ixp4xx/Kconfig
@@ -8,11 +8,9 @@ menu "Intel IXP4xx Implementation Options"
comment "IXP4xx Platforms"
-# This entry is placed on top because otherwise it would have
-# been shown as a submenu.
config MACH_NSLU2
bool
- prompt "NSLU2" if !(MACH_IXDP465 || MACH_IXDPG425 || ARCH_IXDP425 || ARCH_ADI_COYOTE || ARCH_AVILA || ARCH_IXCDP1100 || ARCH_PRPMC1100 || MACH_GTWX5715)
+ prompt "Linksys NSLU2"
help
Say 'Y' here if you want your kernel to support Linksys's
NSLU2 NAS device. For more information on this platform,
diff --git a/arch/arm/mach-ixp4xx/nas100d-power.c b/arch/arm/mach-ixp4xx/nas100d-power.c
index 2bec69b..99d333d 100644
--- a/arch/arm/mach-ixp4xx/nas100d-power.c
+++ b/arch/arm/mach-ixp4xx/nas100d-power.c
@@ -56,6 +56,9 @@ static int __init nas100d_power_init(void)
static void __exit nas100d_power_exit(void)
{
+ if (!(machine_is_nas100d()))
+ return;
+
free_irq(NAS100D_RB_IRQ, NULL);
}
diff --git a/arch/arm/mach-ixp4xx/nas100d-setup.c b/arch/arm/mach-ixp4xx/nas100d-setup.c
index 856d56f..a3b4c6a 100644
--- a/arch/arm/mach-ixp4xx/nas100d-setup.c
+++ b/arch/arm/mach-ixp4xx/nas100d-setup.c
@@ -113,6 +113,9 @@ static void __init nas100d_init(void)
{
ixp4xx_sys_init();
+ /* gpio 14 and 15 are _not_ clocks */
+ *IXP4XX_GPIO_GPCLKR = 0;
+
nas100d_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
nas100d_flash_resource.end =
IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S
index d921c10..2c6c2a7 100644
--- a/arch/arm/mm/cache-v6.S
+++ b/arch/arm/mm/cache-v6.S
@@ -96,15 +96,16 @@ ENTRY(v6_coherent_user_range)
#ifdef HARVARD_CACHE
bic r0, r0, #CACHE_LINE_SIZE - 1
1: mcr p15, 0, r0, c7, c10, 1 @ clean D line
- mcr p15, 0, r0, c7, c5, 1 @ invalidate I line
add r0, r0, #CACHE_LINE_SIZE
cmp r0, r1
blo 1b
#endif
- mcr p15, 0, r0, c7, c5, 6 @ invalidate BTB
-#ifdef HARVARD_CACHE
mov r0, #0
+#ifdef HARVARD_CACHE
mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
+ mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate
+#else
+ mcr p15, 0, r0, c7, c5, 6 @ invalidate BTB
#endif
mov pc, lr
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c
index 330695b..b103e56 100644
--- a/arch/arm/mm/flush.c
+++ b/arch/arm/mm/flush.c
@@ -24,14 +24,16 @@
static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr)
{
unsigned long to = ALIAS_FLUSH_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
+ const int zero = 0;
set_pte(TOP_PTE(to), pfn_pte(pfn, PAGE_KERNEL));
flush_tlb_kernel_page(to);
asm( "mcrr p15, 0, %1, %0, c14\n"
- " mcrr p15, 0, %1, %0, c5\n"
+ " mcr p15, 0, %2, c7, c10, 4\n"
+ " mcr p15, 0, %2, c7, c5, 0\n"
:
- : "r" (to), "r" (to + PAGE_SIZE - L1_CACHE_BYTES)
+ : "r" (to), "r" (to + PAGE_SIZE - L1_CACHE_BYTES), "r" (zero)
: "cc");
}
diff --git a/arch/arm/mm/tlb-v6.S b/arch/arm/mm/tlb-v6.S
index 6f76b89..fd6adde 100644
--- a/arch/arm/mm/tlb-v6.S
+++ b/arch/arm/mm/tlb-v6.S
@@ -80,6 +80,7 @@ ENTRY(v6wbi_flush_kern_tlb_range)
add r0, r0, #PAGE_SZ
cmp r0, r1
blo 1b
+ mcr p15, 0, r2, c7, c10, 4 @ data synchronization barrier
mov pc, lr
.section ".text.init", #alloc, #execinstr
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