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| author | Maxime Ripard <maxime.ripard@free-electrons.com> | 2014-02-01 16:46:16 +0100 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2014-02-07 22:30:02 +0100 |
| commit | 2f41898704d3cff796ea0adaea272808707d758e (patch) | |
| tree | 2710c9920795784ebec60546d3b07b92430d41b3 /arch/arm | |
| parent | 38dbfb59d1175ef458d006556061adeaa8751b72 (diff) | |
| download | op-kernel-dev-2f41898704d3cff796ea0adaea272808707d758e.zip op-kernel-dev-2f41898704d3cff796ea0adaea272808707d758e.tar.gz | |
ARM: sun7i: dt: Fix interrupt trigger types
The Allwinner A20 uses the ARM GIC as its internal interrupts controller. The
GIC can work on several interrupt triggers, and the A20 was actually setting it
up to use a rising edge as a trigger, while it was actually a level high
trigger, leading to some interrupts that would be completely ignored if the
edge was missed.
Fix this for the remaining DT nodes that slipped through.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: stable@vger.kernel.org
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/sun7i-a20.dtsi | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index 119f066..2374f5a 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -454,7 +454,7 @@ rtc: rtc@01c20d00 { compatible = "allwinner,sun7i-a20-rtc"; reg = <0x01c20d00 0x20>; - interrupts = <0 24 1>; + interrupts = <0 24 4>; }; sid: eeprom@01c23800 { @@ -596,10 +596,10 @@ hstimer@01c60000 { compatible = "allwinner,sun7i-a20-hstimer"; reg = <0x01c60000 0x1000>; - interrupts = <0 81 1>, - <0 82 1>, - <0 83 1>, - <0 84 1>; + interrupts = <0 81 4>, + <0 82 4>, + <0 83 4>, + <0 84 4>; clocks = <&ahb_gates 28>; }; |
