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author | Alexander Clouter <alex@digriz.org.uk> | 2011-01-08 11:55:25 +0000 |
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committer | Nicolas Pitre <nico@fluxnic.net> | 2011-03-03 15:53:34 -0500 |
commit | e25bac968d41d994e5295f89547bdff6cb40588a (patch) | |
tree | d81d317bd66d64bb4ec304a4453ba0e9552548f9 /arch/arm | |
parent | f5412be599602124d2bdd49947b231dd77c0bf99 (diff) | |
download | op-kernel-dev-e25bac968d41d994e5295f89547bdff6cb40588a.zip op-kernel-dev-e25bac968d41d994e5295f89547bdff6cb40588a.tar.gz |
[ARM] orion5x: accelerate NAND on the TS-78xx
The NAND supports 32bit reads and writes so lets stop shunting 8bit
chunks across the bus.
Doing a dumb 'dd' benchmark, this increases performance roughly like so:
* read: 1.3MB/s to 3.4MB/s
* write: 614kB/s to 882kB/s
Signed-off-by: Alexander Clouter <alex@digriz.org.uk>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-orion5x/ts78xx-setup.c | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c index c1c1cd0..89682e1 100644 --- a/arch/arm/mach-orion5x/ts78xx-setup.c +++ b/arch/arm/mach-orion5x/ts78xx-setup.c @@ -191,6 +191,60 @@ static int ts78xx_ts_nand_dev_ready(struct mtd_info *mtd) return readb(TS_NAND_CTRL) & 0x20; } +static void ts78xx_ts_nand_write_buf(struct mtd_info *mtd, + const uint8_t *buf, int len) +{ + struct nand_chip *chip = mtd->priv; + void __iomem *io_base = chip->IO_ADDR_W; + unsigned long off = ((unsigned long)buf & 3); + int sz; + + if (off) { + sz = min(4 - off, len); + writesb(io_base, buf, sz); + buf += sz; + len -= sz; + } + + sz = len >> 2; + if (sz) { + u32 *buf32 = (u32 *)buf; + writesl(io_base, buf32, sz); + buf += sz << 2; + len -= sz << 2; + } + + if (len) + writesb(io_base, buf, len); +} + +static void ts78xx_ts_nand_read_buf(struct mtd_info *mtd, + uint8_t *buf, int len) +{ + struct nand_chip *chip = mtd->priv; + void __iomem *io_base = chip->IO_ADDR_R; + unsigned long off = ((unsigned long)buf & 3); + int sz; + + if (off) { + sz = min(4 - off, len); + readsb(io_base, buf, sz); + buf += sz; + len -= sz; + } + + sz = len >> 2; + if (sz) { + u32 *buf32 = (u32 *)buf; + readsl(io_base, buf32, sz); + buf += sz << 2; + len -= sz << 2; + } + + if (len) + readsb(io_base, buf, len); +} + const char *ts_nand_part_probes[] = { "cmdlinepart", NULL }; static struct mtd_partition ts78xx_ts_nand_parts[] = { @@ -233,6 +287,8 @@ static struct platform_nand_data ts78xx_ts_nand_data = { */ .cmd_ctrl = ts78xx_ts_nand_cmd_ctrl, .dev_ready = ts78xx_ts_nand_dev_ready, + .write_buf = ts78xx_ts_nand_write_buf, + .read_buf = ts78xx_ts_nand_read_buf, }, }; |