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| author | Tony Lindgren <tony@atomide.com> | 2008-11-04 13:35:07 -0800 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2008-11-04 13:35:07 -0800 |
| commit | 52414739ca3df12f6d1e78d4dc670e97af0e845f (patch) | |
| tree | 940919acdcecfc586f5eb025855f8e63a63d7bae /arch/arm | |
| parent | e621f266d4cd18a07a833877c3995d2ccb35b951 (diff) | |
| download | op-kernel-dev-52414739ca3df12f6d1e78d4dc670e97af0e845f.zip op-kernel-dev-52414739ca3df12f6d1e78d4dc670e97af0e845f.tar.gz | |
ARM: OMAP: Fix get_irqnr_and_base to clear spurious interrupt bits
On omap24xx, INTCPS_SIR_IRQ_OFFSET bits [6:0] contains the current
active interrupt number.
However, on 34xx INTCPS_SIR_IRQ_OFFSET bits [31:7] also contains the
SPURIOUSIRQFLAG, which gets set if the interrupt sorting information
is invalid.
If the SPURIOUSIRQFLAG bits are not ignored, the interrupt code will
occasionally produce a bunch of confusing errors:
irq -33, desc: c02ddcc8, depth: 0, count: 0, unhandled: 0
->handle_irq(): c006f23c, handle_bad_irq+0x0/0x22c
->chip(): 00000000, 0x0
->action(): 00000000
Fix this by masking out only the ACTIVEIRQ bits. Also fix a
confusing comment.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/plat-omap/include/mach/entry-macro.S | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/plat-omap/include/mach/entry-macro.S b/arch/arm/plat-omap/include/mach/entry-macro.S index 030118e..2276f89 100644 --- a/arch/arm/plat-omap/include/mach/entry-macro.S +++ b/arch/arm/plat-omap/include/mach/entry-macro.S @@ -65,7 +65,8 @@ #include <mach/omap34xx.h> #endif -#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* Active interrupt number */ +#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* Active interrupt offset */ +#define ACTIVEIRQ_MASK 0x7f /* Active interrupt bits */ .macro disable_fiq .endm @@ -88,6 +89,7 @@ cmp \irqnr, #0x0 2222: ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET] + and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */ .endm |
