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authorDarius Augulis <augulis.darius@gmail.com>2008-09-09 10:19:43 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2008-09-09 12:13:54 +0200
commit8b69ac577e644e5084a9d7a93e4ccd5184c77626 (patch)
treec77d8893478e0a18d4dcd86b2c054f9cdda91436 /arch/arm
parentdefa8c309d280915a2e7f4451f70bcbb087088a3 (diff)
downloadop-kernel-dev-8b69ac577e644e5084a9d7a93e4ccd5184c77626.zip
op-kernel-dev-8b69ac577e644e5084a9d7a93e4ccd5184c77626.tar.gz
MXC: Remove WD IRQ priority setting
Remove WD IRQ priority setting from ARCH_MXC common init code, because it's application specific. Signed-off-by: Darius Augulis <augulis.darius@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/plat-mxc/irq.c5
1 files changed, 0 insertions, 5 deletions
diff --git a/arch/arm/plat-mxc/irq.c b/arch/arm/plat-mxc/irq.c
index a41abf0..da28105 100644
--- a/arch/arm/plat-mxc/irq.c
+++ b/arch/arm/plat-mxc/irq.c
@@ -116,11 +116,6 @@ void __init mxc_init_irq(void)
for (i = 0; i < 8; i++)
__raw_writel(0, AVIC_NIPRIORITY(i));
- /* Set WDOG2's interrupt the highest priority level (bit 28-31) */
- reg = __raw_readl(AVIC_NIPRIORITY(6));
- reg |= (0xF << 28);
- __raw_writel(reg, AVIC_NIPRIORITY(6));
-
/* init architectures chained interrupt handler */
mxc_register_gpios();
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