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authorJuergen Beisert <jbe@pengutronix.de>2010-08-16 15:54:07 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2010-08-17 09:31:49 +0200
commitc735c40587cea45f9d2f83339f374595073c1923 (patch)
tree397bf1126692d9fd09ead40b2cda87618f24a7dc /arch/arm
parentc56702de106b4fde301282f7ea60412276481442 (diff)
downloadop-kernel-dev-c735c40587cea45f9d2f83339f374595073c1923.zip
op-kernel-dev-c735c40587cea45f9d2f83339f374595073c1923.tar.gz
clock-imx35: Calculate the base clock rate for the IPU unit
The mx3fb driver needs the clock the IPU runs in order to calculate the divider for the LCD clock. This patch adds the clock rate calculation routine for the i.MX35 CPU. Signed-off-by: Juergen Beisert <jbe@pengutronix.de> Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-mx3/clock-imx35.c29
1 files changed, 28 insertions, 1 deletions
diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c
index 1d311b7..7a62e74 100644
--- a/arch/arm/mach-mx3/clock-imx35.c
+++ b/arch/arm/mach-mx3/clock-imx35.c
@@ -296,6 +296,33 @@ static unsigned long get_rate_ipg_per(struct clk *clk)
}
}
+static unsigned long get_rate_hsp(struct clk *clk)
+{
+ unsigned long hsp_podf = (__raw_readl(CCM_BASE + CCM_PDR0) >> 20) & 0x03;
+ unsigned long fref = get_rate_mpll();
+
+ if (fref > 400 * 1000 * 1000) {
+ switch (hsp_podf) {
+ case 0:
+ return fref >> 2;
+ case 1:
+ return fref >> 3;
+ case 2:
+ return fref / 3;
+ }
+ } else {
+ switch (hsp_podf) {
+ case 0:
+ case 2:
+ return fref / 3;
+ case 1:
+ return fref / 6;
+ }
+ }
+
+ return 0;
+}
+
static int clk_cgr_enable(struct clk *clk)
{
u32 reg;
@@ -353,7 +380,7 @@ DEFINE_CLOCK(i2c1_clk, 0, CCM_CGR1, 10, get_rate_ipg_per, NULL);
DEFINE_CLOCK(i2c2_clk, 1, CCM_CGR1, 12, get_rate_ipg_per, NULL);
DEFINE_CLOCK(i2c3_clk, 2, CCM_CGR1, 14, get_rate_ipg_per, NULL);
DEFINE_CLOCK(iomuxc_clk, 0, CCM_CGR1, 16, NULL, NULL);
-DEFINE_CLOCK(ipu_clk, 0, CCM_CGR1, 18, get_rate_ahb, NULL);
+DEFINE_CLOCK(ipu_clk, 0, CCM_CGR1, 18, get_rate_hsp, NULL);
DEFINE_CLOCK(kpp_clk, 0, CCM_CGR1, 20, get_rate_ipg, NULL);
DEFINE_CLOCK(mlb_clk, 0, CCM_CGR1, 22, get_rate_ahb, NULL);
DEFINE_CLOCK(mshc_clk, 0, CCM_CGR1, 24, get_rate_mshc, NULL);
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