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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2018-05-07 15:24:48 +0200 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2018-05-14 16:40:40 +0200 |
| commit | c02cc235a215e9c518f98da25753b9e02bb7144f (patch) | |
| tree | 145a77ff41d8f2ead558aa30623aaa66cf0611fe /arch/arm | |
| parent | 7207b94754b6f503b278b5b200faaf662ffa1da8 (diff) | |
| download | op-kernel-dev-c02cc235a215e9c518f98da25753b9e02bb7144f.zip op-kernel-dev-c02cc235a215e9c518f98da25753b9e02bb7144f.tar.gz | |
ARM: dts: r7s72100: Correct watchdog timer interrupt type
According to table 7.3 ("List of Interrupt IDs") in the RZ/A1H Hardware
User's Manual rev. 3.00, the watchdog timer interrupt is a level
interrupt.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/r7s72100.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi index 4a1aade..c7b3dca 100644 --- a/arch/arm/boot/dts/r7s72100.dtsi +++ b/arch/arm/boot/dts/r7s72100.dtsi @@ -387,7 +387,7 @@ wdt: watchdog@fcfe0000 { compatible = "renesas,r7s72100-wdt", "renesas,rza-wdt"; reg = <0xfcfe0000 0x6>; - interrupts = <GIC_SPI 106 IRQ_TYPE_EDGE_RISING>; + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; clocks = <&p0_clk>; }; |
