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authorGregory CLEMENT <gregory.clement@free-electrons.com>2013-05-20 16:13:27 +0200
committerJason Cooper <jason@lakedaemon.net>2013-05-20 17:44:54 +0000
commit489e138eec96f529c5e8d4cd3ea45882ecdbf5ca (patch)
treebadd323fe90ee0a813bde9f896bc6c30067e7a2c /arch/arm
parent2b8b2797142c7951e635c6eec5d1705ee9bc45c5 (diff)
downloadop-kernel-dev-489e138eec96f529c5e8d4cd3ea45882ecdbf5ca.zip
op-kernel-dev-489e138eec96f529c5e8d4cd3ea45882ecdbf5ca.tar.gz
ARM: dts: mvebu: Fix wrong the address reg value for the L2-cache node
During the conversion to the internal-regs' subnode, the L2-cache node haven not been converted (due to a wrong choice made by myself during the resolution of the merge conflict when I rebased the commit). This leads to wrong address for L2 cache which prevent it to be used on Armada 370. This commit fix the address reg of the e L2-cache node. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/armada-370.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
index a1a8703..aee2b18 100644
--- a/arch/arm/boot/dts/armada-370.dtsi
+++ b/arch/arm/boot/dts/armada-370.dtsi
@@ -39,7 +39,7 @@
L2: l2-cache {
compatible = "marvell,aurora-outer-cache";
- reg = <0xd0008000 0x1000>;
+ reg = <0x08000 0x1000>;
cache-id-part = <0x100>;
wt-override;
};
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