diff options
| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2018-05-07 15:19:53 +0200 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2018-05-14 16:40:38 +0200 |
| commit | 45e75c425bdd1dd75d93eeaaef4c81d1563f2efa (patch) | |
| tree | 3dc9b97357886feae7aacdb65c4da12a096f8729 /arch/arm | |
| parent | 2acb79e15119512da9b6a49906840e7678cfb618 (diff) | |
| download | op-kernel-dev-45e75c425bdd1dd75d93eeaaef4c81d1563f2efa.zip op-kernel-dev-45e75c425bdd1dd75d93eeaaef4c81d1563f2efa.tar.gz | |
ARM: dts: r8a73a4: Correct mask for GIC PPI interrupts
R-Mobile APE6 (r8a73a4) contains four Cortex-A15 and four Cortex-A7
cores, hence the second interrupt specifier cell for Private Peripheral
Interrupts should use "GIC_CPU_MASK_SIMPLE(8)", so GIC interrupts are
delivered to all 8 processor cores.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/r8a73a4.dtsi | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi index 8e48090..080d037 100644 --- a/arch/arm/boot/dts/r8a73a4.dtsi +++ b/arch/arm/boot/dts/r8a73a4.dtsi @@ -57,10 +57,10 @@ timer { compatible = "arm,armv7-timer"; - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; }; dbsc1: memory-controller@e6790000 { @@ -464,7 +464,7 @@ <0 0xf1002000 0 0x2000>, <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>; - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; clocks = <&mstp4_clks R8A73A4_CLK_INTC_SYS>; clock-names = "clk"; power-domains = <&pd_c4>; |
