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| author | Alexandre Courbot <acourbot@nvidia.com> | 2016-03-28 18:23:03 +0900 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2016-04-26 18:41:05 +0200 |
| commit | 4a0778e98f31709ab3c2dcb19b56a6dc7f44241a (patch) | |
| tree | 603f0d8ada0f5f835438aa46faf0dc301f89fb2c /arch/arm64 | |
| parent | 53cafb93da6fdafc5904c27a3da83123e72e7c13 (diff) | |
| download | op-kernel-dev-4a0778e98f31709ab3c2dcb19b56a6dc7f44241a.zip op-kernel-dev-4a0778e98f31709ab3c2dcb19b56a6dc7f44241a.tar.gz | |
arm64: tegra: Add reference clock to GM20B on Tegra210
This clock is required for the GPU to operate.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm64')
| -rw-r--r-- | arch/arm64/boot/dts/nvidia/tegra210.dtsi | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi index 23b0630..687d354 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -226,8 +226,9 @@ <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "stall", "nonstall"; clocks = <&tegra_car TEGRA210_CLK_GPU>, - <&tegra_car TEGRA210_CLK_PLL_P_OUT5>; - clock-names = "gpu", "pwr"; + <&tegra_car TEGRA210_CLK_PLL_P_OUT5>, + <&tegra_car TEGRA210_CLK_PLL_G_REF>; + clock-names = "gpu", "pwr", "ref"; resets = <&tegra_car 184>; reset-names = "gpu"; status = "disabled"; |
