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authorThierry Reding <treding@nvidia.com>2015-04-13 16:44:33 +0200
committerThierry Reding <treding@nvidia.com>2015-11-24 16:52:22 +0100
commitc552cca31cfdef63182a2114f63d322a9d9bc54f (patch)
treeaeb77c6e65f3a23a4fa3dbc17a613d23de8d2253 /arch/arm64
parent742af7e7a0a132afe85cc7b8ac82fd20c7b63743 (diff)
downloadop-kernel-dev-c552cca31cfdef63182a2114f63d322a9d9bc54f.zip
op-kernel-dev-c552cca31cfdef63182a2114f63d322a9d9bc54f.tar.gz
arm64: tegra: Add NVIDIA P2530 main board support
The NVIDIA P2530 is a processor module used in several reference designs that features a Tegra210 SoC, 4 GiB of LPDDR4 RAM, 16 GiB eMMC and other essentials. It is typically connected to some I/O board that provides the connectors needed to hook it up to the outside world. Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm64')
-rw-r--r--arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi50
1 files changed, 50 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi
new file mode 100644
index 0000000..ece0dec
--- /dev/null
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi
@@ -0,0 +1,50 @@
+#include "tegra210.dtsi"
+
+/ {
+ model = "NVIDIA Tegra210 P2530 main board";
+ compatible = "nvidia,p2530", "nvidia,tegra210";
+
+ aliases {
+ rtc1 = "/rtc@0,7000e000";
+ serial0 = &uarta;
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x0 0x80000000 0x0 0xc0000000>;
+ };
+
+ /* debug port */
+ serial@0,70006000 {
+ status = "okay";
+ };
+
+ i2c@0,7000d000 {
+ status = "okay";
+ clock-frequency = <400000>;
+ };
+
+ pmc@0,7000e400 {
+ nvidia,invert-interrupt;
+ };
+
+ /* eMMC */
+ sdhci@0,700b0600 {
+ status = "okay";
+ bus-width = <8>;
+ non-removable;
+ };
+
+ clocks {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ clk32k_in: clock@0 {
+ compatible = "fixed-clock";
+ reg = <0>;
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ };
+ };
+};
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