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authorJeremy McNicoll <jeremymc@redhat.com>2017-01-29 21:44:33 -0800
committerAndy Gross <andy.gross@linaro.org>2017-06-05 21:28:12 -0500
commit4255db146247dbce60c84a7388f65e82fc139439 (patch)
treecdc6dbf6f98fd08ff2f1f51cdc27e9f8eb88ba53 /arch/arm64
parent75a3f782e85d20591b7b66a3175a8ecbf150609c (diff)
downloadop-kernel-dev-4255db146247dbce60c84a7388f65e82fc139439.zip
op-kernel-dev-4255db146247dbce60c84a7388f65e82fc139439.tar.gz
arm64: dts: smem enablement for msm8992
SMEM allows various subsystems/processors to share memory/data (heap format) in order to enable various peripherals. Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com> Signed-off-by: Andy Gross <andy.gross@linaro.org>
Diffstat (limited to 'arch/arm64')
-rw-r--r--arch/arm64/boot/dts/qcom/msm8992.dtsi42
1 files changed, 42 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8992.dtsi b/arch/arm64/boot/dts/qcom/msm8992.dtsi
index 13fb6f7..1715787 100644
--- a/arch/arm64/boot/dts/qcom/msm8992.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8992.dtsi
@@ -79,6 +79,19 @@
regulator-always-on;
};
+ sfpb_mutex: hwmutex {
+ compatible = "qcom,sfpb-mutex";
+ syscon = <&sfpb_mutex_regs 0x0 0x100>;
+ #hwlock-cells = <1>;
+ };
+
+ smem {
+ compatible = "qcom,smem";
+ memory-region = <&smem_region>;
+ qcom,rpm-msg-ram = <&rpm_msg_ram>;
+ hwlocks = <&sfpb_mutex 3>;
+ };
+
soc {
#address-cells = <1>;
#size-cells = <1>;
@@ -93,6 +106,11 @@
<0xf9002000 0x1000>;
};
+ apcs: syscon@f900d000 {
+ compatible = "syscon";
+ reg = <0xf900d000 0x2000>;
+ };
+
timer@f9020000 {
#address-cells = <1>;
#size-cells = <1>;
@@ -183,12 +201,36 @@
#power-domain-cells = <1>;
reg = <0xfc400000 0x2000>;
};
+
+ rpm_msg_ram: memory@fc428000 {
+ compatible = "qcom,rpm-msg-ram";
+ reg = <0xfc428000 0x4000>;
+ };
+
+ sfpb_mutex_regs: syscon@fd484000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "syscon";
+ reg = <0xfd484000 0x400>;
+ };
};
memory {
device_type = "memory";
reg = <0 0 0 0>; // bootloader will update
};
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ smem_region: smem@6a00000 {
+ reg = <0x0 0x6a00000 0x0 0x200000>;
+ no-map;
+ };
+ };
+
};
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