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| author | Will Deacon <will.deacon@arm.com> | 2013-06-12 16:28:04 +0100 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2013-09-03 10:18:02 +0100 |
| commit | d50240a5f6ceaf690a77b0fccb17be51cfa151c2 (patch) | |
| tree | 843603100f6987bf50a4e40713121c1e2a323b7f /arch/arm64/kernel | |
| parent | 909e3ee4119f87b85c6e1b8534b2287ed1ea3ca2 (diff) | |
| download | op-kernel-dev-d50240a5f6ceaf690a77b0fccb17be51cfa151c2.zip op-kernel-dev-d50240a5f6ceaf690a77b0fccb17be51cfa151c2.tar.gz | |
arm64: mm: permit use of tagged pointers at EL0
TCR.TBI0 can be used to cause hardware address translation to ignore the
top byte of userspace virtual addresses. Whilst not especially useful in
standard C programs, this can be used by JITs to `tag' pointers with
various pieces of metadata.
This patch enables this bit for AArch64 Linux, and adds a new file to
Documentation/arm64/ which describes some potential caveats when using
tagged virtual addresses.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/kernel')
| -rw-r--r-- | arch/arm64/kernel/entry.S | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S index 57640df..3881fd1 100644 --- a/arch/arm64/kernel/entry.S +++ b/arch/arm64/kernel/entry.S @@ -423,6 +423,7 @@ el0_da: * Data abort handling */ mrs x0, far_el1 + bic x0, x0, #(0xff << 56) disable_step x1 isb enable_dbg |
