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author | Marc Zyngier <marc.zyngier@arm.com> | 2015-06-12 12:06:36 +0100 |
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committer | Catalin Marinas <catalin.marinas@arm.com> | 2015-06-12 15:11:50 +0100 |
commit | 94a9e04aa16abd1194d9b4158c618ba87f5d01e6 (patch) | |
tree | 5236f56cd5226f3d27f3d55fdaf0e8f6cbacfa71 /arch/arm64/include/asm | |
parent | 73bf8412e4f24b114c853012663fff4d3cde06a2 (diff) | |
download | op-kernel-dev-94a9e04aa16abd1194d9b4158c618ba87f5d01e6.zip op-kernel-dev-94a9e04aa16abd1194d9b4158c618ba87f5d01e6.tar.gz |
arm64: alternative: Introduce feature for GICv3 CPU interface
Add a new item to the feature set (ARM64_HAS_SYSREG_GIC_CPUIF)
to indicate that we have a system register GIC CPU interface
This will help KVM switching to alternative instruction patching.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/include/asm')
-rw-r--r-- | arch/arm64/include/asm/cpufeature.h | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h index 82cb9f9..c104421 100644 --- a/arch/arm64/include/asm/cpufeature.h +++ b/arch/arm64/include/asm/cpufeature.h @@ -24,8 +24,9 @@ #define ARM64_WORKAROUND_CLEAN_CACHE 0 #define ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE 1 #define ARM64_WORKAROUND_845719 2 +#define ARM64_HAS_SYSREG_GIC_CPUIF 3 -#define ARM64_NCAPS 3 +#define ARM64_NCAPS 4 #ifndef __ASSEMBLY__ @@ -38,6 +39,11 @@ struct arm64_cpu_capabilities { u32 midr_model; u32 midr_range_min, midr_range_max; }; + + struct { /* Feature register checking */ + u64 register_mask; + u64 register_value; + }; }; }; |