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| author | Arnd Bergmann <arnd@arndb.de> | 2018-01-10 22:06:48 +0100 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2018-01-11 18:00:29 -0800 |
| commit | acbf76ee05067c3942852019993f7beb69a0f45f (patch) | |
| tree | bbec92e25b1db522b3e2f29a55834dc9492c9057 /arch/arm64/boot | |
| parent | 712070d1484a6503f5432b415900d424b4555d8d (diff) | |
| download | op-kernel-dev-acbf76ee05067c3942852019993f7beb69a0f45f.zip op-kernel-dev-acbf76ee05067c3942852019993f7beb69a0f45f.tar.gz | |
arm64: dts: add #cooling-cells to CPU nodes
dtc complains about the lack of #coolin-cells properties for the
CPU nodes that are referred to as "cooling-device":
arch/arm64/boot/dts/mediatek/mt8173-evb.dtb: Warning (cooling_device_property): Missing property '#cooling-cells' in node /cpus/cpu@0 or bad phandle (referred from /thermal-zones/cpu_thermal/cooling-maps/map@0:cooling-device[0])
arch/arm64/boot/dts/mediatek/mt8173-evb.dtb: Warning (cooling_device_property): Missing property '#cooling-cells' in node /cpus/cpu@100 or bad phandle (referred from /thermal-zones/cpu_thermal/cooling-maps/map@1:cooling-device[0])
Apparently this property must be '<2>' to match the binding.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm64/boot')
| -rw-r--r-- | arch/arm64/boot/dts/mediatek/mt8173.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi index 31bc593..0cafed3 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi @@ -155,6 +155,7 @@ reg = <0x000>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; + #cooling-cells = <2>; clocks = <&infracfg CLK_INFRA_CA53SEL>, <&apmixedsys CLK_APMIXED_MAINPLL>; clock-names = "cpu", "intermediate"; @@ -179,6 +180,7 @@ reg = <0x100>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; + #cooling-cells = <2>; clocks = <&infracfg CLK_INFRA_CA57SEL>, <&apmixedsys CLK_APMIXED_MAINPLL>; clock-names = "cpu", "intermediate"; |
