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authorVladimir Barinov <vladimir.barinov+renesas@cogentembedded.com>2017-01-26 17:54:20 +0300
committerSimon Horman <horms+renesas@verge.net.au>2017-05-22 14:36:16 +0200
commit2a3ee629ed8b2f1de496f57edd3f30cd5e8584cf (patch)
treeaa53822784cb7ef34670a9282c6a29ad39b19d9e /arch/arm64/boot/dts/renesas
parent82c906fac243f1a5d99867551c0933aee414bfbb (diff)
downloadop-kernel-dev-2a3ee629ed8b2f1de496f57edd3f30cd5e8584cf.zip
op-kernel-dev-2a3ee629ed8b2f1de496f57edd3f30cd5e8584cf.tar.gz
arm64: dts: m3ulcb: Update memory node to 2 GiB map
This patch updates memory region: - After changes, the new map of the m3ulcb board on R8A7796 SoC Bank0: 1GiB RAM : 0x000048000000 -> 0x0007fffffff Bank1: 1GiB RAM : 0x000600000000 -> 0x0063fffffff - Before changes, the old map looked like this: Bank0: 1GiB RAM : 0x000048000000 -> 0x0007fffffff Signed-off-by: Vladimir Barinov <vladimir.barinov+renesas@cogentembedded.com> Tested-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm64/boot/dts/renesas')
-rw-r--r--arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
index 5554b55..02051a3 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
@@ -32,6 +32,11 @@
reg = <0x0 0x48000000 0x0 0x38000000>;
};
+ memory@600000000 {
+ device_type = "memory";
+ reg = <0x6 0x00000000 0x0 0x40000000>;
+ };
+
leds {
compatible = "gpio-leds";
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