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author | Vladimir Barinov <vladimir.barinov+renesas@cogentembedded.com> | 2017-01-26 18:13:52 +0300 |
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committer | Simon Horman <horms+renesas@verge.net.au> | 2017-03-06 09:54:26 +0100 |
commit | a262d66224c4c34bc2bee16d4d37d460a738788c (patch) | |
tree | 28f65e018fcc8136a850035ebfda8b5c081e716a /arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts | |
parent | 006ced572a3b2247639ce06443aff00704888001 (diff) | |
download | op-kernel-dev-a262d66224c4c34bc2bee16d4d37d460a738788c.zip op-kernel-dev-a262d66224c4c34bc2bee16d4d37d460a738788c.tar.gz |
arm64: dts: h3ulcb: Update memory node to 4 GiB map
This patch adds memory region:
- After changes, the H3ULCB board has the following map:
Bank0: 1GiB RAM : 0x000048000000 -> 0x0007fffffff
Bank1: 1GiB RAM : 0x000500000000 -> 0x0053fffffff
Bank2: 1GiB RAM : 0x000600000000 -> 0x0063fffffff
Bank3: 1GiB RAM : 0x000700000000 -> 0x0073fffffff
- Before changes, the old map looked like this:
Bank0: 1GiB RAM : 0x000048000000 -> 0x0007fffffff
Signed-off-by: Vladimir Barinov <vladimir.barinov+renesas@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts')
-rw-r--r-- | arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts index c5f8f69..9811534 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts +++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts @@ -33,6 +33,21 @@ reg = <0x0 0x48000000 0x0 0x38000000>; }; + memory@500000000 { + device_type = "memory"; + reg = <0x5 0x00000000 0x0 0x40000000>; + }; + + memory@600000000 { + device_type = "memory"; + reg = <0x6 0x00000000 0x0 0x40000000>; + }; + + memory@700000000 { + device_type = "memory"; + reg = <0x7 0x00000000 0x0 0x40000000>; + }; + leds { compatible = "gpio-leds"; |