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authorGregory CLEMENT <gregory.clement@free-electrons.com>2016-12-14 17:43:48 +0100
committerGregory CLEMENT <gregory.clement@free-electrons.com>2017-04-28 16:08:12 +0200
commit6a680783aaadd168557eec695374929ac066536f (patch)
treef45899a3daa84e2f87a442088b6f2be72a3ddf30 /arch/arm64/boot/dts/marvell/armada-37xx.dtsi
parentafda007feda5cfe7463f3281dfeee703a5dc7ca3 (diff)
downloadop-kernel-dev-6a680783aaadd168557eec695374929ac066536f.zip
op-kernel-dev-6a680783aaadd168557eec695374929ac066536f.tar.gz
ARM64: dts: marvell: armada37xx: add pinctrl definition
Start to populate the device tree of the Armada 37xx with the pincontrol configuration used on the board providing a dts. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Diffstat (limited to 'arch/arm64/boot/dts/marvell/armada-37xx.dtsi')
-rw-r--r--arch/arm64/boot/dts/marvell/armada-37xx.dtsi31
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
index e6216cb..f581c74 100644
--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
@@ -190,6 +190,31 @@
clock-output-names = "xtal";
#clock-cells = <0>;
};
+
+ spi_quad_pins: spi-quad-pins {
+ groups = "spi_quad";
+ function = "spi";
+ };
+
+ i2c1_pins: i2c1-pins {
+ groups = "i2c1";
+ function = "i2c";
+ };
+
+ i2c2_pins: i2c2-pins {
+ groups = "i2c2";
+ function = "i2c";
+ };
+
+ uart1_pins: uart1-pins {
+ groups = "uart1";
+ function = "uart";
+ };
+
+ uart2_pins: uart2-pins {
+ groups = "uart2";
+ function = "uart";
+ };
};
pinctrl_sb: pinctrl@18800 {
@@ -207,6 +232,12 @@
<GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
};
+
+ rgmii_pins: mii-pins {
+ groups = "rgmii";
+ function = "mii";
+ };
+
};
eth0: ethernet@30000 {
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