Merge tag 'armsoc-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM/arm64 Devicetree updates from Olof Johansson:
 "As usual, device tree updates is the bulk of our material in this
  merge window. This time around, 559 patches affecting both 32- and
  64-bit platforms.

  Changes are too many to list individually, but some of the larger
  ones:

  New platform/SoC support:

   - Automotive:
     + Renesas R-Car D3 (R8A77995)
     + TI DT76x
     + MediaTek mt2712e
   - Communication-oriented:
     + Qualcomm IPQ8074
     + Broadcom Stingray
     + Marvell Armada 8080
   - Set top box:
     + Uniphier PXs3

  Besides some vendor reference boards for the SoC above, there are also
  several new boards/machines:

   - TI AM335x Moxa UC-8100-ME-T open platform
   - TI AM57xx Beaglebone X15 Rev C
   - Microchip/Atmel sama5d27 SoM1 EK
   - Broadcom Raspberry Pi Zero W
   - Gemini-based D-Link DIR-685 router
   - Freescale i.MX6:
     + Toradex Apalis module + Apalis and Ixora carrier boards
     + Engicam GEAM6UL Starter Kit
   - Freescale i.MX53-based Beckhoff CX9020 Embedded PC
   - Mediatek mt7623-based BananaPi R2
   - Several Allwinner-based single-board computers:
  + Cubietruck plus
  + Bananapi M3, M2M and M64
  + NanoPi A64
  + A64-OLinuXino
  + Pine64
   - Rockchip RK3328 Pine64/Rock64 board support
   - Rockchip RK3399 boards:
  + RK3399 Sapphire module on Excavator carrier (RK3399 reference design)
  + Theobroma Systems RK3399-Q7 SoM
   - ZTE ZX296718 PCBOX Board"

* tag 'armsoc-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (559 commits)
  ARM: dts: at91: at91sam9g45: add AC97
  arm64: dts: marvell: mcbin: enable more networking ports
  arm64: dts: marvell: add a reference to the sysctrl syscon in the ppv2 node
  arm64: dts: marvell: add TX interrupts for PPv2.2
  arm64: dts: uniphier: add PXs3 SoC support
  ARM: dts: uniphier: add pinctrl groups of ethernet phy mode
  ARM: dts: uniphier: fix size of sdctrl nodes
  ARM: dts: uniphier: add AIDET nodes
  arm64: dts: uniphier: fix size of sdctrl node
  arm64: dts: uniphier: add AIDET nodes
  Revert "ARM: dts: sun8i: h3: Enable dwmac-sun8i on the Beelink X2"
  arm64: dts: uniphier: add reset controller node of analog amplifier
  arm64: dts: marvell: add Device Tree files for Armada-8KP
  arm64: dts: rockchip: add Haikou baseboard with RK3399-Q7 SoM
  arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM
  dt-bindings: add rk3399-q7 SoM
  ARM: dts: rockchip: enable usb for rv1108-evb
  ARM: dts: rockchip: add usb nodes for rv1108 SoCs
  dt-bindings: update grf-binding for rv1108 SoCs
  ARM: dts: aspeed-g4: fix AHB window size of the SMC controllers
  ...

1 files changed, 17 insertions, 0 deletions

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
index d789c68..8d73930 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
@@ -53,6 +53,7 @@
 		compatible = "arm,cortex-a57";
 		reg = <0x0>;
 		clocks = <&clockgen 1 0>;
+		cpu-idle-states = <&CPU_PW20>;
 		next-level-cache = <&cluster0_l2>;
 		#cooling-cells = <2>;
 	};
@@ -62,6 +63,7 @@
 		compatible = "arm,cortex-a57";
 		reg = <0x1>;
 		clocks = <&clockgen 1 0>;
+		cpu-idle-states = <&CPU_PW20>;
 		next-level-cache = <&cluster0_l2>;
 	};
 
@@ -70,6 +72,7 @@
 		compatible = "arm,cortex-a57";
 		reg = <0x100>;
 		clocks = <&clockgen 1 1>;
+		cpu-idle-states = <&CPU_PW20>;
 		next-level-cache = <&cluster1_l2>;
 		#cooling-cells = <2>;
 	};
@@ -79,6 +82,7 @@
 		compatible = "arm,cortex-a57";
 		reg = <0x101>;
 		clocks = <&clockgen 1 1>;
+		cpu-idle-states = <&CPU_PW20>;
 		next-level-cache = <&cluster1_l2>;
 	};
 
@@ -87,6 +91,7 @@
 		compatible = "arm,cortex-a57";
 		reg = <0x200>;
 		clocks = <&clockgen 1 2>;
+		cpu-idle-states = <&CPU_PW20>;
 		next-level-cache = <&cluster2_l2>;
 		#cooling-cells = <2>;
 	};
@@ -96,6 +101,7 @@
 		compatible = "arm,cortex-a57";
 		reg = <0x201>;
 		clocks = <&clockgen 1 2>;
+		cpu-idle-states = <&CPU_PW20>;
 		next-level-cache = <&cluster2_l2>;
 	};
 
@@ -105,6 +111,7 @@
 		reg = <0x300>;
 		clocks = <&clockgen 1 3>;
 		next-level-cache = <&cluster3_l2>;
+		cpu-idle-states = <&CPU_PW20>;
 		#cooling-cells = <2>;
 	};
 
@@ -113,6 +120,7 @@
 		compatible = "arm,cortex-a57";
 		reg = <0x301>;
 		clocks = <&clockgen 1 3>;
+		cpu-idle-states = <&CPU_PW20>;
 		next-level-cache = <&cluster3_l2>;
 	};
 
@@ -131,6 +139,15 @@
 	cluster3_l2: l2-cache3 {
 		compatible = "cache";
 	};
+
+	CPU_PW20: cpu-pw20 {
+		compatible = "arm,idle-state";
+		idle-state-name = "PW20";
+		arm,psci-suspend-param = <0x00010000>;
+		entry-latency-us = <2000>;
+		exit-latency-us = <2000>;
+		min-residency-us = <6000>;
+	};
 };
 
 &pcie1 {