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author | Andre Przywara <andre.przywara@arm.com> | 2015-12-15 13:36:38 +0000 |
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committer | Sudeep Holla <sudeep.holla@arm.com> | 2016-02-09 10:46:31 +0000 |
commit | 6ba29e916e15c11341b0e043ed643555143e9e64 (patch) | |
tree | 5549168cfad4413c051b4d1cd5400ae9a18b11e5 /arch/arm64/boot/dts/arm | |
parent | d11a8979667818d44f25ebe4efeed258d9f770e8 (diff) | |
download | op-kernel-dev-6ba29e916e15c11341b0e043ed643555143e9e64.zip op-kernel-dev-6ba29e916e15c11341b0e043ed643555143e9e64.tar.gz |
arm64: dts: add .dts for GICv3 Foundation model
The ARMv8 Foundation model sports a command line parameter to use
a GICv3 emulation instead of the default GICv2 interrupt controller.
Add a new .dts file which reuses most of the definitions of the
existing model while just adding the required properties for the
GICv3 node.
This allows the public Foundation model to run with a GICv3.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Diffstat (limited to 'arch/arm64/boot/dts/arm')
-rw-r--r-- | arch/arm64/boot/dts/arm/Makefile | 2 | ||||
-rw-r--r-- | arch/arm64/boot/dts/arm/foundation-v8-gicv3.dts | 30 |
2 files changed, 31 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/arm/Makefile b/arch/arm64/boot/dts/arm/Makefile index bb3c072..46d342d 100644 --- a/arch/arm64/boot/dts/arm/Makefile +++ b/arch/arm64/boot/dts/arm/Makefile @@ -1,4 +1,4 @@ -dtb-$(CONFIG_ARCH_VEXPRESS) += foundation-v8.dtb +dtb-$(CONFIG_ARCH_VEXPRESS) += foundation-v8.dtb foundation-v8-gicv3.dtb dtb-$(CONFIG_ARCH_VEXPRESS) += juno.dtb juno-r1.dtb dtb-$(CONFIG_ARCH_VEXPRESS) += rtsm_ve-aemv8a.dtb dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2f-1xv7-ca53x2.dtb diff --git a/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dts b/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dts new file mode 100644 index 0000000..35588df --- /dev/null +++ b/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dts @@ -0,0 +1,30 @@ +/* + * ARM Ltd. + * + * ARMv8 Foundation model DTS (GICv3 configuration) + */ + +#include "foundation-v8.dtsi" + +/ { + gic: interrupt-controller@2f000000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <3>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + interrupt-controller; + reg = <0x0 0x2f000000 0x0 0x10000>, + <0x0 0x2f100000 0x0 0x200000>, + <0x0 0x2c000000 0x0 0x2000>, + <0x0 0x2c010000 0x0 0x2000>, + <0x0 0x2c02f000 0x0 0x2000>; + interrupts = <1 9 4>; + + its: its@2f020000 { + compatible = "arm,gic-v3-its"; + msi-controller; + reg = <0x0 0x2f020000 0x0 0x20000>; + }; + }; +}; |