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| author | Icenowy Zheng <icenowy@aosc.xyz> | 2017-04-04 17:51:00 +0800 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2017-04-04 17:45:09 +0200 |
| commit | ec4279053a6434f685246e022be95d2a62f8c608 (patch) | |
| tree | aed18d491293c3717a1f04e211e13acc4b1e10ff /arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | |
| parent | 791a9e001d3ba3b552888b0bf3c592a50b71f57e (diff) | |
| download | op-kernel-dev-ec4279053a6434f685246e022be95d2a62f8c608.zip op-kernel-dev-ec4279053a6434f685246e022be95d2a62f8c608.tar.gz | |
arm64: allwinner: a64: add R_PIO pinctrl node
Allwinner A64 have a dedicated pin controller to manage the PL pin bank.
As the driver and the required clock support are added, add the device
node for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index 1d4e5bc..6bc606b 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -409,5 +409,17 @@ #clock-cells = <1>; #reset-cells = <1>; }; + + r_pio: pinctrl@01f02c00 { + compatible = "allwinner,sun50i-a64-r-pinctrl"; + reg = <0x01f02c00 0x400>; + interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&r_ccu 3>, <&osc24M>, <&osc32k>; + clock-names = "apb", "hosc", "losc"; + gpio-controller; + #gpio-cells = <3>; + interrupt-controller; + #interrupt-cells = <3>; + }; }; }; |
