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| author | Catalin Marinas <catalin.marinas@arm.com> | 2007-09-25 15:22:24 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-01-26 14:41:28 +0000 |
| commit | 25ebee020bd34d1f4c5678538204f0b10bf9f6d5 (patch) | |
| tree | b9b04ddf0b9916922a3cba47a7f64f44cd0b28ff /arch/arm/vfp/vfphw.S | |
| parent | c98929c07a01c9ec2e1e5253456acc7168da8b66 (diff) | |
| download | op-kernel-dev-25ebee020bd34d1f4c5678538204f0b10bf9f6d5.zip op-kernel-dev-25ebee020bd34d1f4c5678538204f0b10bf9f6d5.tar.gz | |
[ARM] 4583/1: ARMv7: Add VFPv3 support
This patch adds the support for VFPv3 (the kernel currently supports
VFPv2). The main difference is 32 double registers (compared to 16).
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/vfp/vfphw.S')
| -rw-r--r-- | arch/arm/vfp/vfphw.S | 22 |
1 files changed, 18 insertions, 4 deletions
diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S index 53d9f8e..353f9e5c 100644 --- a/arch/arm/vfp/vfphw.S +++ b/arch/arm/vfp/vfphw.S @@ -99,12 +99,12 @@ vfp_support_entry: DBGSTR1 "save old state %p", r4 cmp r4, #0 beq no_old_VFP_process + VFPFSTMIA r4, r5 @ save the working registers VFPFMRX r5, FPSCR @ current status tst r1, #FPEXC_EX @ is there additional state to save? VFPFMRX r6, FPINST, NE @ FPINST (only if FPEXC.EX is set) tstne r1, #FPEXC_FP2V @ is there an FPINST2 to read? VFPFMRX r8, FPINST2, NE @ FPINST2 if needed (and present) - VFPFSTMIA r4 @ save the working registers stmia r4, {r1, r5, r6, r8} @ save FPEXC, FPSCR, FPINST, FPINST2 @ and point r4 at the word at the @ start of the register dump @@ -114,7 +114,7 @@ no_old_VFP_process: DBGSTR1 "load state %p", r10 str r10, [r3, r11, lsl #2] @ update the last_VFP_context pointer @ Load the saved state back into the VFP - VFPFLDMIA r10 @ reload the working registers while + VFPFLDMIA r10, r5 @ reload the working registers while @ FPEXC is in a safe state ldmia r10, {r1, r5, r6, r8} @ load FPEXC, FPSCR, FPINST, FPINST2 tst r1, #FPEXC_EX @ is there additional state to restore? @@ -174,12 +174,12 @@ vfp_save_state: @ r0 - save location @ r1 - FPEXC DBGSTR1 "save VFP state %p", r0 + VFPFSTMIA r0, r2 @ save the working registers VFPFMRX r2, FPSCR @ current status tst r1, #FPEXC_EX @ is there additional state to save? VFPFMRX r3, FPINST, NE @ FPINST (only if FPEXC.EX is set) tstne r1, #FPEXC_FP2V @ is there an FPINST2 to read? VFPFMRX r12, FPINST2, NE @ FPINST2 if needed (and present) - VFPFSTMIA r0 @ save the working registers stmia r0, {r1, r2, r3, r12} @ save FPEXC, FPSCR, FPINST, FPINST2 mov pc, lr #endif @@ -217,8 +217,15 @@ vfp_get_double: fmrrd r0, r1, d\dr mov pc, lr .endr +#ifdef CONFIG_VFPv3 + @ d16 - d31 registers + .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 + mrrc p11, 3, r0, r1, c\dr @ fmrrd r0, r1, d\dr + mov pc, lr + .endr +#endif - @ virtual register 16 for compare with zero + @ virtual register 16 (or 32 if VFPv3) for compare with zero mov r0, #0 mov r1, #0 mov pc, lr @@ -231,3 +238,10 @@ vfp_put_double: fmdrr d\dr, r0, r1 mov pc, lr .endr +#ifdef CONFIG_VFPv3 + @ d16 - d31 registers + .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 + mcrr p11, 3, r1, r2, c\dr @ fmdrr r1, r2, d\dr + mov pc, lr + .endr +#endif |
