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| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-01-05 13:25:15 +0000 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-01-05 13:25:27 +0000 |
| commit | 7b9dd47136c07ffd883aff6926c7b281e4c1eea4 (patch) | |
| tree | b835312e76fe323de3e1cbbb0d15fca5a3f7ef9c /arch/arm/plat-tcc/include/mach/hardware.h | |
| parent | 2e0e943436912ffe0848ece58167edfe754edb96 (diff) | |
| parent | 0575fb754dbfc32a01f297e778533340a533ec68 (diff) | |
| download | op-kernel-dev-7b9dd47136c07ffd883aff6926c7b281e4c1eea4.zip op-kernel-dev-7b9dd47136c07ffd883aff6926c7b281e4c1eea4.tar.gz | |
Merge branch 'restart' into for-linus
Conflicts:
arch/arm/mach-exynos/cpu.c
The changes to arch/arm/mach-exynos/cpu.c were moved to
mach-exynos/common.c.
Diffstat (limited to 'arch/arm/plat-tcc/include/mach/hardware.h')
| -rw-r--r-- | arch/arm/plat-tcc/include/mach/hardware.h | 43 |
1 files changed, 0 insertions, 43 deletions
diff --git a/arch/arm/plat-tcc/include/mach/hardware.h b/arch/arm/plat-tcc/include/mach/hardware.h deleted file mode 100644 index e70d126..0000000 --- a/arch/arm/plat-tcc/include/mach/hardware.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * Author: RidgeRun, Inc. Greg Lonnon <glonnon@ridgerun.com> - * Reorganized for Linux-2.6 by Tony Lindgren <tony@atomide.com> - * and Dirk Behme <dirk.behme@de.bosch.com> - * Rewritten by: <linux@telechips.com> - * Description: Hardware definitions for TCC8300 processors and boards - * - * Copyright (C) 2001 RidgeRun, Inc. - * Copyright (C) 2008-2009 Telechips - * - * Modifications for mainline (C) 2009 Hans J. Koch <hjk@linutronix.de> - * - * Licensed under the terms of the GNU Pulic License version 2. - */ - -#ifndef __ASM_ARCH_TCC_HARDWARE_H -#define __ASM_ARCH_TCC_HARDWARE_H - -#include <asm/sizes.h> -#ifndef __ASSEMBLER__ -#include <asm/types.h> -#endif -#include <mach/io.h> - -/* - * ---------------------------------------------------------------------------- - * Clocks - * ---------------------------------------------------------------------------- - */ -#define CLKGEN_REG_BASE 0xfffece00 -#define ARM_CKCTL (CLKGEN_REG_BASE + 0x0) -#define ARM_IDLECT1 (CLKGEN_REG_BASE + 0x4) -#define ARM_IDLECT2 (CLKGEN_REG_BASE + 0x8) -#define ARM_EWUPCT (CLKGEN_REG_BASE + 0xC) -#define ARM_RSTCT1 (CLKGEN_REG_BASE + 0x10) -#define ARM_RSTCT2 (CLKGEN_REG_BASE + 0x14) -#define ARM_SYSST (CLKGEN_REG_BASE + 0x18) -#define ARM_IDLECT3 (CLKGEN_REG_BASE + 0x24) - -/* DPLL control registers */ -#define DPLL_CTL 0xfffecf00 - -#endif /* __ASM_ARCH_TCC_HARDWARE_H */ |
