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author | David S. Miller <davem@davemloft.net> | 2009-06-15 03:02:23 -0700 |
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committer | David S. Miller <davem@davemloft.net> | 2009-06-15 03:02:23 -0700 |
commit | 9cbc1cb8cd46ce1f7645b9de249b2ce8460129bb (patch) | |
tree | 8d104ec2a459346b99413b0b77421ca7b9936c1a /arch/arm/plat-stmp3xxx/include/mach/system.h | |
parent | ca44d6e60f9de26281fda203f58b570e1748c015 (diff) | |
parent | 45e3e1935e2857c54783291107d33323b3ef33c8 (diff) | |
download | op-kernel-dev-9cbc1cb8cd46ce1f7645b9de249b2ce8460129bb.zip op-kernel-dev-9cbc1cb8cd46ce1f7645b9de249b2ce8460129bb.tar.gz |
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts:
Documentation/feature-removal-schedule.txt
drivers/scsi/fcoe/fcoe.c
net/core/drop_monitor.c
net/core/net-traces.c
Diffstat (limited to 'arch/arm/plat-stmp3xxx/include/mach/system.h')
-rw-r--r-- | arch/arm/plat-stmp3xxx/include/mach/system.h | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/arch/arm/plat-stmp3xxx/include/mach/system.h b/arch/arm/plat-stmp3xxx/include/mach/system.h new file mode 100644 index 0000000..28a9888 --- /dev/null +++ b/arch/arm/plat-stmp3xxx/include/mach/system.h @@ -0,0 +1,49 @@ +/* + * Copyright (C) 2005 Sigmatel Inc + * + * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +#include <asm/proc-fns.h> +#include <mach/platform.h> +#include <mach/regs-clkctrl.h> +#include <mach/regs-power.h> + +static inline void arch_idle(void) +{ + /* + * This should do all the clock switching + * and wait for interrupt tricks + */ + + cpu_do_idle(); +} + +static inline void arch_reset(char mode, const char *cmd) +{ + /* Set BATTCHRG to default value */ + __raw_writel(0x00010000, REGS_POWER_BASE + HW_POWER_CHARGE); + + /* Set MINPWR to default value */ + __raw_writel(0, REGS_POWER_BASE + HW_POWER_MINPWR); + + /* Reset digital side of chip (but not power or RTC) */ + __raw_writel(BM_CLKCTRL_RESET_DIG, + REGS_CLKCTRL_BASE + HW_CLKCTRL_RESET); + + /* Should not return */ +} + +#endif |