diff options
author | Heiko Stuebner <heiko@sntech.de> | 2011-10-12 21:34:11 +0900 |
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committer | Kukjin Kim <kgene.kim@samsung.com> | 2011-10-12 21:34:32 +0900 |
commit | 18c55cd466c12ede49638822d3a71eb1f24e0d25 (patch) | |
tree | 232cb75ed5f6467f1efe8e1b07addea007fc68ef /arch/arm/plat-samsung | |
parent | c034b184597d93ad7749aca3e8bd1c2105104f07 (diff) | |
download | op-kernel-dev-18c55cd466c12ede49638822d3a71eb1f24e0d25.zip op-kernel-dev-18c55cd466c12ede49638822d3a71eb1f24e0d25.tar.gz |
ARM: SAMSUNG: Add adc registers for S3C2443/S3C2416
The adc blocks of the S3C2443 and S3C2416 define some
additional registers and bits.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/plat-samsung')
-rw-r--r-- | arch/arm/plat-samsung/include/plat/regs-adc.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/plat-samsung/include/plat/regs-adc.h b/arch/arm/plat-samsung/include/plat/regs-adc.h index 035e8c3..7061210 100644 --- a/arch/arm/plat-samsung/include/plat/regs-adc.h +++ b/arch/arm/plat-samsung/include/plat/regs-adc.h @@ -20,6 +20,7 @@ #define S3C2410_ADCDAT0 S3C2410_ADCREG(0x0C) #define S3C2410_ADCDAT1 S3C2410_ADCREG(0x10) #define S3C64XX_ADCUPDN S3C2410_ADCREG(0x14) +#define S3C2443_ADCMUX S3C2410_ADCREG(0x18) #define S3C64XX_ADCCLRINT S3C2410_ADCREG(0x18) #define S5P_ADCMUX S3C2410_ADCREG(0x1C) #define S3C64XX_ADCCLRINTPNDNUP S3C2410_ADCREG(0x20) @@ -33,6 +34,7 @@ #define S3C2410_ADCCON_PRSCVLMASK (0xFF<<6) #define S3C2410_ADCCON_SELMUX(x) (((x)&0x7)<<3) #define S3C2410_ADCCON_MUXMASK (0x7<<3) +#define S3C2416_ADCCON_RESSEL (1 << 3) #define S3C2410_ADCCON_STDBM (1<<2) #define S3C2410_ADCCON_READ_START (1<<1) #define S3C2410_ADCCON_ENABLE_START (1<<0) @@ -40,6 +42,7 @@ /* ADCTSC Register Bits */ +#define S3C2443_ADCTSC_UD_SEN (1 << 8) #define S3C2410_ADCTSC_YM_SEN (1<<7) #define S3C2410_ADCTSC_YP_SEN (1<<6) #define S3C2410_ADCTSC_XM_SEN (1<<5) |