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| author | Marek Szyprowski <m.szyprowski@samsung.com> | 2010-10-02 11:48:09 +0900 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2010-10-21 07:54:57 +0900 |
| commit | 9adf5d222cfbbc4b7e972bfe3472368f9b453091 (patch) | |
| tree | 46983cb8aabb55629fe029e47e0d0c7c2ce73f5f /arch/arm/plat-s5p | |
| parent | 8ce14a221efe8ef9019e2c5b1e06fcd329e66d78 (diff) | |
| download | op-kernel-dev-9adf5d222cfbbc4b7e972bfe3472368f9b453091.zip op-kernel-dev-9adf5d222cfbbc4b7e972bfe3472368f9b453091.tar.gz | |
ARM: S5P: Unify defines for both gpio interrupt types
Samsung S5P SoCs have the same interrupt type defines for both
external interrupts and gpio interrupts. This patch removes all
duplicates from S5PC100 and S5PV210 specific includes as well as
gpio interrupt code and put a common defines to plat/irqs.h
NOTE: Do not use this for S5P6440 and S5P6450.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[kgene.kim@samsung.com: add note for S5P64X0]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/plat-s5p')
| -rw-r--r-- | arch/arm/plat-s5p/include/plat/irqs.h | 7 | ||||
| -rw-r--r-- | arch/arm/plat-s5p/irq-eint.c | 10 | ||||
| -rw-r--r-- | arch/arm/plat-s5p/irq-gpioint.c | 16 |
3 files changed, 17 insertions, 16 deletions
diff --git a/arch/arm/plat-s5p/include/plat/irqs.h b/arch/arm/plat-s5p/include/plat/irqs.h index 23603c7..7f653bc 100644 --- a/arch/arm/plat-s5p/include/plat/irqs.h +++ b/arch/arm/plat-s5p/include/plat/irqs.h @@ -103,4 +103,11 @@ #define S5P_GPIOINT_GROUP_SIZE 8 #define S5P_GPIOINT_COUNT (S5P_GPIOINT_GROUP_COUNT * S5P_GPIOINT_GROUP_SIZE) +/* IRQ types common for all s5p platforms */ +#define S5P_IRQ_TYPE_LEVEL_LOW (0x00) +#define S5P_IRQ_TYPE_LEVEL_HIGH (0x01) +#define S5P_IRQ_TYPE_EDGE_FALLING (0x02) +#define S5P_IRQ_TYPE_EDGE_RISING (0x03) +#define S5P_IRQ_TYPE_EDGE_BOTH (0x04) + #endif /* __ASM_PLAT_S5P_IRQS_H */ diff --git a/arch/arm/plat-s5p/irq-eint.c b/arch/arm/plat-s5p/irq-eint.c index f36cd33..752f1a6 100644 --- a/arch/arm/plat-s5p/irq-eint.c +++ b/arch/arm/plat-s5p/irq-eint.c @@ -67,23 +67,23 @@ static int s5p_irq_eint_set_type(unsigned int irq, unsigned int type) switch (type) { case IRQ_TYPE_EDGE_RISING: - newvalue = S5P_EXTINT_RISEEDGE; + newvalue = S5P_IRQ_TYPE_EDGE_RISING; break; case IRQ_TYPE_EDGE_FALLING: - newvalue = S5P_EXTINT_FALLEDGE; + newvalue = S5P_IRQ_TYPE_EDGE_FALLING; break; case IRQ_TYPE_EDGE_BOTH: - newvalue = S5P_EXTINT_BOTHEDGE; + newvalue = S5P_IRQ_TYPE_EDGE_BOTH; break; case IRQ_TYPE_LEVEL_LOW: - newvalue = S5P_EXTINT_LOWLEV; + newvalue = S5P_IRQ_TYPE_LEVEL_LOW; break; case IRQ_TYPE_LEVEL_HIGH: - newvalue = S5P_EXTINT_HILEV; + newvalue = S5P_IRQ_TYPE_LEVEL_HIGH; break; default: diff --git a/arch/arm/plat-s5p/irq-gpioint.c b/arch/arm/plat-s5p/irq-gpioint.c index 768fd39..0e5dc8c 100644 --- a/arch/arm/plat-s5p/irq-gpioint.c +++ b/arch/arm/plat-s5p/irq-gpioint.c @@ -28,12 +28,6 @@ #define GPIOINT_MASK_OFFSET 0x900 #define GPIOINT_PEND_OFFSET 0xA00 -#define GPIOINT_LEVEL_LOW 0x0 -#define GPIOINT_LEVEL_HIGH 0x1 -#define GPIOINT_EDGE_FALLING 0x2 -#define GPIOINT_EDGE_RISING 0x3 -#define GPIOINT_EDGE_BOTH 0x4 - static struct s3c_gpio_chip *irq_chips[S5P_GPIOINT_GROUP_MAXNR]; static int s5p_gpioint_get_group(unsigned int irq) @@ -118,19 +112,19 @@ static int s5p_gpioint_set_type(unsigned int irq, unsigned int type) switch (type) { case IRQ_TYPE_EDGE_RISING: - type = GPIOINT_EDGE_RISING; + type = S5P_IRQ_TYPE_EDGE_RISING; break; case IRQ_TYPE_EDGE_FALLING: - type = GPIOINT_EDGE_FALLING; + type = S5P_IRQ_TYPE_EDGE_FALLING; break; case IRQ_TYPE_EDGE_BOTH: - type = GPIOINT_EDGE_BOTH; + type = S5P_IRQ_TYPE_EDGE_BOTH; break; case IRQ_TYPE_LEVEL_HIGH: - type = GPIOINT_LEVEL_HIGH; + type = S5P_IRQ_TYPE_LEVEL_HIGH; break; case IRQ_TYPE_LEVEL_LOW: - type = GPIOINT_LEVEL_LOW; + type = S5P_IRQ_TYPE_LEVEL_LOW; break; case IRQ_TYPE_NONE: default: |
