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author | Pannaga Bhushan <p.bhushan@samsung.com> | 2010-05-24 15:08:31 +0900 |
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committer | Ben Dooks <ben-linux@fluff.org> | 2010-05-26 19:09:50 +0900 |
commit | 5fae405838527c136a920eb7b9a2edfc5d2b6198 (patch) | |
tree | 5d5bdf81c15d383c67632552d0a1f10efd31ee7c /arch/arm/plat-s5p/irq-eint.c | |
parent | b1cdc4670b9508fcd47a15fbd12f70d269880b37 (diff) | |
download | op-kernel-dev-5fae405838527c136a920eb7b9a2edfc5d2b6198.zip op-kernel-dev-5fae405838527c136a920eb7b9a2edfc5d2b6198.tar.gz |
ARM: S5P: Fix the platform external interrupt issues.
This patch does the following:
1. Corrects the common platform code for external interrupts for using the
VIC mask/unmask bits also.
2. Moves the common defines related to external interrupt for plat-s5p
to common files.
3. Based on the new common defines, corresponding changes are made in the
affected platforms (S5P6440, S5P6442 and S5PC100).
Signed-off-by: Pannaga Bhushan <p.bhushan@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s5p/irq-eint.c')
-rw-r--r-- | arch/arm/plat-s5p/irq-eint.c | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/arch/arm/plat-s5p/irq-eint.c b/arch/arm/plat-s5p/irq-eint.c index eaa70aa..e56c807 100644 --- a/arch/arm/plat-s5p/irq-eint.c +++ b/arch/arm/plat-s5p/irq-eint.c @@ -60,7 +60,7 @@ static void s5p_irq_eint_maskack(unsigned int irq) static int s5p_irq_eint_set_type(unsigned int irq, unsigned int type) { - int offs = eint_offset(irq); + int offs = EINT_OFFSET(irq); int shift; u32 ctrl, mask; u32 newvalue = 0; @@ -139,17 +139,16 @@ static struct irq_chip s5p_irq_eint = { */ static inline void s5p_irq_demux_eint(unsigned int start) { - u32 status; + u32 status = __raw_readl(S5P_EINT_PEND(EINT_REG_NR(start))); u32 mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(start))); unsigned int irq; - status = __raw_readl(S5P_EINT_PEND(EINT_REG_NR(start))); status &= ~mask; status &= 0xff; while (status) { - irq = fls(status); - generic_handle_irq(irq - 1 + start); + irq = fls(status) - 1; + generic_handle_irq(irq + start); status &= ~(1 << irq); } } @@ -162,12 +161,18 @@ static void s5p_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc) static inline void s5p_irq_vic_eint_mask(unsigned int irq) { + void __iomem *base = get_irq_chip_data(irq); + s5p_irq_eint_mask(irq); + writel(1 << EINT_OFFSET(irq), base + VIC_INT_ENABLE_CLEAR); } static void s5p_irq_vic_eint_unmask(unsigned int irq) { + void __iomem *base = get_irq_chip_data(irq); + s5p_irq_eint_unmask(irq); + writel(1 << EINT_OFFSET(irq), base + VIC_INT_ENABLE); } static inline void s5p_irq_vic_eint_ack(unsigned int irq) |