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authorLinus Torvalds <torvalds@linux-foundation.org>2009-03-28 14:03:14 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2009-03-28 14:03:14 -0700
commit0fe41b8982001cd14ee2c77cd776735a5024e98b (patch)
tree83e65d595c413d55259ea14fb97748ce5efe5707 /arch/arm/plat-s3c64xx/irq-eint.c
parenteedf2c5296a8dfaaf9aec1a938c1d3bd73159a30 (diff)
parent9759d22c8348343b0da4e25d6150c41712686c14 (diff)
downloadop-kernel-dev-0fe41b8982001cd14ee2c77cd776735a5024e98b.zip
op-kernel-dev-0fe41b8982001cd14ee2c77cd776735a5024e98b.tar.gz
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (422 commits) [ARM] 5435/1: fix compile warning in sanity_check_meminfo() [ARM] 5434/1: ARM: OMAP: Fix mailbox compile for 24xx [ARM] pxa: fix the bad assumption that PCMCIA sockets always start with 0 [ARM] pxa: fix Colibri PXA300 and PXA320 LCD backlight pins imxfb: Fix TFT mode i.MX21/27: remove ifdef CONFIG_FB_IMX imxfb: add clock support mxc: add arch_reset() function clkdev: add possibility to get a clock based on the device name i.MX1: remove fb support from mach-imx [ARM] pxa: build arch/arm/plat-pxa/mfp.c only when PXA3xx or ARCH_MMP defined Gemini: Add support for Teltonika RUT100 Gemini: gpiolib based GPIO support v2 MAINTAINERS: add myself as Gemini architecture maintainer ARM: Add Gemini architecture v3 [ARM] OMAP: Fix compile for omap2_init_common_hw() MAINTAINERS: Add myself as Faraday ARM core variant maintainer ARM: Add support for FA526 v2 [ARM] acorn,ebsa110,footbridge,integrator,sa1100: Convert asm/io.h to linux/io.h [ARM] collie: fix two minor formatting nits ...
Diffstat (limited to 'arch/arm/plat-s3c64xx/irq-eint.c')
-rw-r--r--arch/arm/plat-s3c64xx/irq-eint.c14
1 files changed, 0 insertions, 14 deletions
diff --git a/arch/arm/plat-s3c64xx/irq-eint.c b/arch/arm/plat-s3c64xx/irq-eint.c
index cf52482..47e5155 100644
--- a/arch/arm/plat-s3c64xx/irq-eint.c
+++ b/arch/arm/plat-s3c64xx/irq-eint.c
@@ -27,20 +27,6 @@
#include <mach/map.h>
#include <plat/cpu.h>
-/* GPIO is 0x7F008xxx, */
-#define S3C64XX_GPIOREG(x) (S3C64XX_VA_GPIO + (x))
-
-#define S3C64XX_EINT0CON0 S3C64XX_GPIOREG(0x900)
-#define S3C64XX_EINT0CON1 S3C64XX_GPIOREG(0x904)
-#define S3C64XX_EINT0FLTCON0 S3C64XX_GPIOREG(0x910)
-#define S3C64XX_EINT0FLTCON1 S3C64XX_GPIOREG(0x914)
-#define S3C64XX_EINT0FLTCON2 S3C64XX_GPIOREG(0x918)
-#define S3C64XX_EINT0FLTCON3 S3C64XX_GPIOREG(0x91C)
-
-#define S3C64XX_EINT0MASK S3C64XX_GPIOREG(0x920)
-#define S3C64XX_EINT0PEND S3C64XX_GPIOREG(0x924)
-
-
#define eint_offset(irq) ((irq) - IRQ_EINT(0))
#define eint_irq_to_bit(irq) (1 << eint_offset(irq))
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