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authorBen Dooks <ben-linux@fluff.org>2009-05-17 23:30:45 +0100
committerBen Dooks <ben-linux@fluff.org>2009-05-17 23:30:45 +0100
commit3cba5ef862bc2c2a0cf2841d993bfb99b9a6c476 (patch)
tree97000464c961fca757c2131d53680ebed2997e10 /arch/arm/plat-s3c/include
parent3f7ea467be1bad860c0f71ba7373dd3cf76b485a (diff)
downloadop-kernel-dev-3cba5ef862bc2c2a0cf2841d993bfb99b9a6c476.zip
op-kernel-dev-3cba5ef862bc2c2a0cf2841d993bfb99b9a6c476.tar.gz
[ARM] S3C: Move watchdog system reset to own file.
Move the watchdog reset code from <mach/system-reset.h> to a new file <plat/watchdog-reset.h> as this code is needed by both s3c2410, s3c64xx and soon-to-be added s3c24a0. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s3c/include')
-rw-r--r--arch/arm/plat-s3c/include/plat/watchdog-reset.h48
1 files changed, 48 insertions, 0 deletions
diff --git a/arch/arm/plat-s3c/include/plat/watchdog-reset.h b/arch/arm/plat-s3c/include/plat/watchdog-reset.h
new file mode 100644
index 0000000..277506a
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/watchdog-reset.h
@@ -0,0 +1,48 @@
+/* arch/arm/plat-s3c/include/plat/watchdog-reset.h
+ *
+ * Copyright (c) 2008 Simtec Electronics
+ * Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C2410 - System define for arch_reset() function
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <plat/regs-watchdog.h>
+
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/io.h>
+
+static inline void arch_wdt_reset(void)
+{
+ struct clk *wdtclk;
+
+ printk("arch_reset: attempting watchdog reset\n");
+
+ __raw_writel(0, S3C2410_WTCON); /* disable watchdog, to be safe */
+
+ wdtclk = clk_get(NULL, "watchdog");
+ if (!IS_ERR(wdtclk)) {
+ clk_enable(wdtclk);
+ } else
+ printk(KERN_WARNING "%s: warning: cannot get watchdog clock\n", __func__);
+
+ /* put initial values into count and data */
+ __raw_writel(0x80, S3C2410_WTCNT);
+ __raw_writel(0x80, S3C2410_WTDAT);
+
+ /* set the watchdog to go and reset... */
+ __raw_writel(S3C2410_WTCON_ENABLE|S3C2410_WTCON_DIV16|S3C2410_WTCON_RSTEN |
+ S3C2410_WTCON_PRESCALE(0x20), S3C2410_WTCON);
+
+ /* wait for reset to assert... */
+ mdelay(500);
+
+ printk(KERN_ERR "Watchdog reset failed to assert reset\n");
+
+ /* delay to allow the serial port to show the message */
+ mdelay(50);
+}
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