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authorBrian Norris <norris@broadcom.com>2010-08-20 12:36:12 -0700
committerDavid Woodhouse <David.Woodhouse@intel.com>2010-10-24 23:38:30 +0100
commit13ed7aed45e370f30a746e49e674144297a92e16 (patch)
tree8f559b677e3629263ef5d3bd5cfc26bc540c8155 /arch/arm/plat-pxa
parent5c709ee9f33da4a07d94e3d48b297eb6f003fc61 (diff)
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mtd: nand: support new Toshiba SLC
Toshiba does not use ONFI for their NAND flash. So we have to continue to add new IDs used by Toshiba devices as well as heuristic detection for scanning the 2nd page for a BBM. This is a relatively harmless start at supporting many of them. These chips mostly follow the same ID fields of previous generations, but there is a need for a tweak. These chips introduce a strange 576 byte OOB (that's 36 bytes per 512 bytes of page). In the preliminary data, Toshiba has not defined exactly how their ID strings should decode. In the future, a new tweak must be added. Data is taken from, among others, Toshiba TC58TxG4S2FBAxx Signed-off-by: Brian Norris <norris@broadcom.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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