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authorAndrew Lunn <andrew@lunn.ch>2012-04-11 21:07:45 +0200
committerMike Turquette <mturquette@linaro.org>2012-05-08 16:34:04 -0700
commit98d9986cb8bf65f8316b45244fdafc1d12c303be (patch)
tree88e6367c63a01ea8fe2c6480eea6d9d0782fa502 /arch/arm/plat-orion
parente919c71665d2386eec6dc2ecd58d01bae69fc0fd (diff)
downloadop-kernel-dev-98d9986cb8bf65f8316b45244fdafc1d12c303be.zip
op-kernel-dev-98d9986cb8bf65f8316b45244fdafc1d12c303be.tar.gz
ARM: Kirkwood: Replace clock gating
Add a varient of the basic clk-gate code. This variant calls a function before gating the clock off. This function is used to disable the SATA or PCIe PHY. Now that all the drivers prepare and enable there clk as needed, there is no need for the common code to keep track of which clocks need gating on. Let the common clock framework turn off clocks which are not used. Buy using the added clk varient, when the clk framework turns off SATA or PCIe clocks, we also disabled SATA and PCIe PHYs which were not needed. The function kirkwood_pcie_id() can now be called outside of __init code, so remove this property for it, and functions it calls. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Jamie Lentin <jm@lentin.co.uk> Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'arch/arm/plat-orion')
-rw-r--r--arch/arm/plat-orion/pcie.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/plat-orion/pcie.c b/arch/arm/plat-orion/pcie.c
index 86dbb5b..f20a321 100644
--- a/arch/arm/plat-orion/pcie.c
+++ b/arch/arm/plat-orion/pcie.c
@@ -52,12 +52,12 @@
#define PCIE_DEBUG_SOFT_RESET (1<<20)
-u32 __init orion_pcie_dev_id(void __iomem *base)
+u32 orion_pcie_dev_id(void __iomem *base)
{
return readl(base + PCIE_DEV_ID_OFF) >> 16;
}
-u32 __init orion_pcie_rev(void __iomem *base)
+u32 orion_pcie_rev(void __iomem *base)
{
return readl(base + PCIE_DEV_REV_OFF) & 0xff;
}
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