diff options
author | Arnd Bergmann <arnd@arndb.de> | 2012-05-16 16:35:25 +0200 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2012-05-16 16:35:25 +0200 |
commit | 3c0dec5f58b3c7b3627715126d1bf9b030a076f0 (patch) | |
tree | 4bf8f56fca3bf6be109209b116fc8e32cb2e0f9e /arch/arm/plat-orion/pcie.c | |
parent | fcd8d84a585f3578a9ebdd27e757495a27415322 (diff) | |
parent | 7e0fa1b5fa91d9aa456d102c273b2cf0f2e95d39 (diff) | |
download | op-kernel-dev-3c0dec5f58b3c7b3627715126d1bf9b030a076f0.zip op-kernel-dev-3c0dec5f58b3c7b3627715126d1bf9b030a076f0.tar.gz |
Merge branch 'clk-next' of git://git.linaro.org/people/mturquette/linux into next/clock
* 'clk-next' of git://git.linaro.org/people/mturquette/linux:
clk: Fix CLK_SET_RATE_GATE flag validation in clk_set_rate().
clk: Provide dummy clk_unregister()
ARM: Kirkwood: Replace clock gating
ARM: Orion: Audio: Add clk/clkdev support
ARM: Orion: PCIE: Add support for clk
ARM: Orion: XOR: Add support for clk
ARM: Orion: CESA: Add support for clk
ARM: Orion: SDIO: Add support for clk.
ARM: Orion: NAND: Add support for clk, if there is one.
ARM: Orion: EHCI: Add support for enabling clocks
ARM: Orion: SATA: Add per channel clk/clkdev support.
ARM: Orion: UART: Get the clock rate via clk_get_rate().
ARM: Orion: WDT: Add clk/clkdev support
ARM: Orion: Eth: Add clk/clkdev support.
ARM: Orion: SPI: Add clk/clkdev support.
ARM: Orion: Add clocks using the generic clk infrastructure.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/plat-orion/pcie.c')
-rw-r--r-- | arch/arm/plat-orion/pcie.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/plat-orion/pcie.c b/arch/arm/plat-orion/pcie.c index 86dbb5b..f20a321 100644 --- a/arch/arm/plat-orion/pcie.c +++ b/arch/arm/plat-orion/pcie.c @@ -52,12 +52,12 @@ #define PCIE_DEBUG_SOFT_RESET (1<<20) -u32 __init orion_pcie_dev_id(void __iomem *base) +u32 orion_pcie_dev_id(void __iomem *base) { return readl(base + PCIE_DEV_ID_OFF) >> 16; } -u32 __init orion_pcie_rev(void __iomem *base) +u32 orion_pcie_rev(void __iomem *base) { return readl(base + PCIE_DEV_REV_OFF) & 0xff; } |