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| author | Tero Kristo <tero.kristo@nokia.com> | 2009-06-19 19:08:29 -0600 |
|---|---|---|
| committer | paul <paul@twilight.(none)> | 2009-06-19 19:09:32 -0600 |
| commit | 3afec6332e1e7cf2d74e0bf08160a68f43a59073 (patch) | |
| tree | b0b6d4b12d54cb5079975a3a58583c98f892f708 /arch/arm/plat-omap/include | |
| parent | df14e4747aa58126a508ae26661c73d83127c831 (diff) | |
| download | op-kernel-dev-3afec6332e1e7cf2d74e0bf08160a68f43a59073.zip op-kernel-dev-3afec6332e1e7cf2d74e0bf08160a68f43a59073.tar.gz | |
OMAP3: Add support for DPLL3 divisor values higher than 2
Previously only 1 and 2 was supported. This is needed for DVFS VDD2 control.
Signed-off-by: Tero Kristo <tero.kristo@nokia.com>
Diffstat (limited to 'arch/arm/plat-omap/include')
| -rw-r--r-- | arch/arm/plat-omap/include/mach/sram.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/plat-omap/include/mach/sram.h b/arch/arm/plat-omap/include/mach/sram.h index 4f87056..4d53cc5 100644 --- a/arch/arm/plat-omap/include/mach/sram.h +++ b/arch/arm/plat-omap/include/mach/sram.h @@ -24,7 +24,8 @@ extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); extern u32 omap3_configure_core_dpll(u32 sdrc_rfr_ctrl, u32 sdrc_actim_ctrla, u32 sdrc_actim_ctrlb, u32 m2, - u32 unlock_dll, u32 f, u32 sdrc_mr); + u32 unlock_dll, u32 f, u32 sdrc_mr, + u32 inc); /* Do not use these */ extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl); @@ -62,7 +63,8 @@ extern unsigned long omap243x_sram_reprogram_sdrc_sz; extern u32 omap3_sram_configure_core_dpll(u32 sdrc_rfr_ctrl, u32 sdrc_actim_ctrla, u32 sdrc_actim_ctrlb, u32 m2, - u32 unlock_dll, u32 f, u32 sdrc_mr); + u32 unlock_dll, u32 f, u32 sdrc_mr, + u32 inc); extern unsigned long omap3_sram_configure_core_dpll_sz; #endif |
