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| author | Vishwanath BS <vishwanath.bs@ti.com> | 2010-02-22 22:09:09 -0700 |
|---|---|---|
| committer | Paul Walmsley <paul@pwsan.com> | 2010-02-24 12:15:03 -0700 |
| commit | 678bc9a2eabb7f444ef8ad1cfc5ef394e2bd8bf2 (patch) | |
| tree | d9849e2d6c57dee95dd72634a86b9bf097f45c1f /arch/arm/plat-omap/include | |
| parent | 358965d7bab9c70c11b64931da02667b161cb03a (diff) | |
| download | op-kernel-dev-678bc9a2eabb7f444ef8ad1cfc5ef394e2bd8bf2.zip op-kernel-dev-678bc9a2eabb7f444ef8ad1cfc5ef394e2bd8bf2.tar.gz | |
OMAP3 clock: Introduce 3630 DPLL4 HSDivider changes
Divider (M2, M3, M4, M5 and M6) field width has been increased by 1 bit
in 3630. This patch has changes to accommodate this in CM dynamically
based on chip version.
Basically new clock nodes have been added for 3630 DPLL4 M2,M3,M4,M5 and
M6 and value of these nodes are used if cpu type is 3630.
Signed-off-by: Vishwanath BS <vishwanath.bs@ti.com>
[paul@pwsan.com: updated to apply on 2.6.34 queue; comments added]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/plat-omap/include')
| -rw-r--r-- | arch/arm/plat-omap/include/plat/clock.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h index f5f30c7..63a2334 100644 --- a/arch/arm/plat-omap/include/plat/clock.h +++ b/arch/arm/plat-omap/include/plat/clock.h @@ -167,8 +167,9 @@ extern const struct clkops clkops_null; #define RATE_IN_242X (1 << 1) #define RATE_IN_243X (1 << 2) #define RATE_IN_343X (1 << 3) /* rates common to all 343X */ -#define RATE_IN_3430ES2 (1 << 4) /* 3430ES2 rates only */ -#define RATE_IN_4430 (1 << 5) +#define RATE_IN_3430ES2 (1 << 4) /* 3430ES2 rates only */ +#define RATE_IN_36XX (1 << 5) +#define RATE_IN_4430 (1 << 6) #define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X) |
