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author | Thara Gopinath <thara@ti.com> | 2010-02-24 12:05:50 -0700 |
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committer | Paul Walmsley <paul@pwsan.com> | 2010-02-24 12:05:50 -0700 |
commit | cde08f81b1d7952ae00c4be2165da629ef985522 (patch) | |
tree | fa2d18f724d441054fdaff01d0a4370868b660f4 /arch/arm/plat-omap/include | |
parent | 4133a44e28cb65c380903ca69806eec039401f46 (diff) | |
download | op-kernel-dev-cde08f81b1d7952ae00c4be2165da629ef985522.zip op-kernel-dev-cde08f81b1d7952ae00c4be2165da629ef985522.tar.gz |
OMAP3 PM: Adding counters for power domain logic off and mem off during retention.
This patch adds counters to keep track of whether the powerdomain
logic or software controllable memory banks are turned off when
the power domain enters retention. During power domain retention
if logic gets turned off, the scenario is known as Open Switch Retention.
Also during retention s/w controllable memory banks of a power
domain can be chosen to be kept in retention or off.
This patch adds one counter per powerdomain to track the power domain
logic state during retention. Number of memory bank state counters
added depends on the number of software controllable memory banks
of the powerdomain. To view these counters do
cat ../debug/pm_debug/count
Signed-off-by: Thara Gopinath <thara@ti.com>
[paul@pwsan.com: conditional expressions simplified; counter increment
code moved to its own function]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/plat-omap/include')
-rw-r--r-- | arch/arm/plat-omap/include/plat/powerdomain.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/plat-omap/include/plat/powerdomain.h b/arch/arm/plat-omap/include/plat/powerdomain.h index 6657ff2d..d82b2c0 100644 --- a/arch/arm/plat-omap/include/plat/powerdomain.h +++ b/arch/arm/plat-omap/include/plat/powerdomain.h @@ -100,6 +100,8 @@ struct powerdomain { struct list_head node; int state; unsigned state_counter[PWRDM_MAX_PWRSTS]; + unsigned ret_logic_off_counter; + unsigned ret_mem_off_counter[PWRDM_MAX_MEM_BANKS]; #ifdef CONFIG_PM_DEBUG s64 timer; |