diff options
author | David Woodhouse <David.Woodhouse@intel.com> | 2008-08-12 11:28:00 +0100 |
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committer | David Woodhouse <David.Woodhouse@intel.com> | 2008-08-12 11:28:00 +0100 |
commit | 742c52533b05d8ae83c794bd6811100675b85ce5 (patch) | |
tree | de89a81d88c19504d1dc4f023a4b480c9022b3b5 /arch/arm/plat-omap/include/mach/sram.h | |
parent | 36cd4fb5d277f34fe9e4db0deac2d4efd7dff735 (diff) | |
parent | 10fec20ef5eec1c91913baec1225400f0d02df40 (diff) | |
download | op-kernel-dev-742c52533b05d8ae83c794bd6811100675b85ce5.zip op-kernel-dev-742c52533b05d8ae83c794bd6811100675b85ce5.tar.gz |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts:
include/asm-arm/arch-omap/onenand.h
Diffstat (limited to 'arch/arm/plat-omap/include/mach/sram.h')
-rw-r--r-- | arch/arm/plat-omap/include/mach/sram.h | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/arch/arm/plat-omap/include/mach/sram.h b/arch/arm/plat-omap/include/mach/sram.h new file mode 100644 index 0000000..e093234 --- /dev/null +++ b/arch/arm/plat-omap/include/mach/sram.h @@ -0,0 +1,56 @@ +/* + * arch/arm/plat-omap/include/mach/sram.h + * + * Interface for functions that need to be run in internal SRAM + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ARCH_ARM_OMAP_SRAM_H +#define __ARCH_ARM_OMAP_SRAM_H + +extern int __init omap_sram_init(void); +extern void * omap_sram_push(void * start, unsigned long size); +extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl); + +extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, + u32 base_cs, u32 force_unlock); +extern void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, + u32 mem_type); +extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); + +/* Do not use these */ +extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl); +extern unsigned long omap1_sram_reprogram_clock_sz; + +extern void omap24xx_sram_reprogram_clock(u32 ckctl, u32 dpllctl); +extern unsigned long omap24xx_sram_reprogram_clock_sz; + +extern void omap242x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, + u32 base_cs, u32 force_unlock); +extern unsigned long omap242x_sram_ddr_init_sz; + +extern u32 omap242x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, + int bypass); +extern unsigned long omap242x_sram_set_prcm_sz; + +extern void omap242x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, + u32 mem_type); +extern unsigned long omap242x_sram_reprogram_sdrc_sz; + + +extern void omap243x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, + u32 base_cs, u32 force_unlock); +extern unsigned long omap243x_sram_ddr_init_sz; + +extern u32 omap243x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, + int bypass); +extern unsigned long omap243x_sram_set_prcm_sz; + +extern void omap243x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, + u32 mem_type); +extern unsigned long omap243x_sram_reprogram_sdrc_sz; + +#endif |