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authorOlof Johansson <olof@lixom.net>2012-05-09 02:31:01 -0700
committerOlof Johansson <olof@lixom.net>2012-05-09 02:31:01 -0700
commitd5a2a1ba838f60d92bf67c5eef533e95453752cb (patch)
treef6436b5e2b430197f37e49ffff23e91ef694b303 /arch/arm/plat-omap/dma.c
parente1851240a891a305946814587497f121b900b4be (diff)
parentd48b97b403d23f6df0b990cee652bdf9a52337a3 (diff)
downloadop-kernel-dev-d5a2a1ba838f60d92bf67c5eef533e95453752cb.zip
op-kernel-dev-d5a2a1ba838f60d92bf67c5eef533e95453752cb.tar.gz
Merge tag 'v3.4-rc6' into next/cleanup
Linux 3.4-rc6 Resolve conflict where an u5500 file had a bugfix go in, but was deleted in the branch staged for next merge window. Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/plat-omap/dma.c')
-rw-r--r--arch/arm/plat-omap/dma.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 612227e..987e610 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -925,6 +925,13 @@ void omap_start_dma(int lch)
l |= OMAP_DMA_CCR_BUFFERING_DISABLE;
l |= OMAP_DMA_CCR_EN;
+ /*
+ * As dma_write() uses IO accessors which are weakly ordered, there
+ * is no guarantee that data in coherent DMA memory will be visible
+ * to the DMA device. Add a memory barrier here to ensure that any
+ * such data is visible prior to enabling DMA.
+ */
+ mb();
p->dma_write(l, CCR, lch);
dma_chan[lch].flags |= OMAP_DMA_ACTIVE;
@@ -974,6 +981,13 @@ void omap_stop_dma(int lch)
p->dma_write(l, CCR, lch);
}
+ /*
+ * Ensure that data transferred by DMA is visible to any access
+ * after DMA has been disabled. This is important for coherent
+ * DMA regions.
+ */
+ mb();
+
if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) {
int next_lch, cur_lch = lch;
char dma_chan_link_map[MAX_LOGICAL_DMA_CH_COUNT];
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