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author | Jiri Kosina <jkosina@suse.cz> | 2010-08-04 15:14:38 +0200 |
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committer | Jiri Kosina <jkosina@suse.cz> | 2010-08-04 15:14:38 +0200 |
commit | d790d4d583aeaed9fc6f8a9f4d9f8ce6b1c15c7f (patch) | |
tree | 854ab394486288d40fa8179cbfaf66e8bdc44b0f /arch/arm/plat-nomadik/timer.c | |
parent | 73b2c7165b76b20eb1290e7efebc33cfd21db1ca (diff) | |
parent | 3a09b1be53d23df780a0cd0e4087a05e2ca4a00c (diff) | |
download | op-kernel-dev-d790d4d583aeaed9fc6f8a9f4d9f8ce6b1c15c7f.zip op-kernel-dev-d790d4d583aeaed9fc6f8a9f4d9f8ce6b1c15c7f.tar.gz |
Merge branch 'master' into for-next
Diffstat (limited to 'arch/arm/plat-nomadik/timer.c')
-rw-r--r-- | arch/arm/plat-nomadik/timer.c | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/arch/arm/plat-nomadik/timer.c b/arch/arm/plat-nomadik/timer.c index 08aaa4a..ea3ca86 100644 --- a/arch/arm/plat-nomadik/timer.c +++ b/arch/arm/plat-nomadik/timer.c @@ -42,7 +42,6 @@ static struct clocksource nmdk_clksrc = { .rating = 200, .read = nmdk_read_timer_dummy, .mask = CLOCKSOURCE_MASK(32), - .shift = 20, .flags = CLOCK_SOURCE_IS_CONTINUOUS, }; @@ -82,6 +81,12 @@ static void nmdk_clkevt_mode(enum clock_event_mode mode, case CLOCK_EVT_MODE_UNUSED: /* disable irq */ writel(0, mtu_base + MTU_IMSC); + /* disable timer */ + cr = readl(mtu_base + MTU_CR(1)); + cr &= ~MTU_CRn_ENA; + writel(cr, mtu_base + MTU_CR(1)); + /* load some high default value */ + writel(0xffffffff, mtu_base + MTU_LR(1)); break; case CLOCK_EVT_MODE_RESUME: break; @@ -98,7 +103,6 @@ static int nmdk_clkevt_next(unsigned long evt, struct clock_event_device *ev) static struct clock_event_device nmdk_clkevt = { .name = "mtu_1", .features = CLOCK_EVT_FEAT_ONESHOT, - .shift = 32, .rating = 200, .set_mode = nmdk_clkevt_mode, .set_next_event = nmdk_clkevt_next, @@ -151,6 +155,7 @@ void __init nmdk_timer_init(void) } else { cr |= MTU_CRn_PRESCALE_1; } + clocksource_calc_mult_shift(&nmdk_clksrc, rate, MTU_MIN_RANGE); /* Timer 0 is the free running clocksource */ writel(cr, mtu_base + MTU_CR(0)); @@ -158,7 +163,6 @@ void __init nmdk_timer_init(void) writel(0, mtu_base + MTU_BGLR(0)); writel(cr | MTU_CRn_ENA, mtu_base + MTU_CR(0)); - nmdk_clksrc.mult = clocksource_hz2mult(rate, nmdk_clksrc.shift); /* Now the scheduling clock is ready */ nmdk_clksrc.read = nmdk_read_timer; @@ -175,8 +179,10 @@ void __init nmdk_timer_init(void) } else { cr |= MTU_CRn_PRESCALE_1; } + clockevents_calc_mult_shift(&nmdk_clkevt, rate, MTU_MIN_RANGE); + writel(cr | MTU_CRn_ONESHOT, mtu_base + MTU_CR(1)); /* off, currently */ - nmdk_clkevt.mult = div_sc(rate, NSEC_PER_SEC, nmdk_clkevt.shift); + nmdk_clkevt.max_delta_ns = clockevent_delta2ns(0xffffffff, &nmdk_clkevt); nmdk_clkevt.min_delta_ns = |