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authorFabio Estevam <festevam@gmail.com>2012-02-02 20:02:32 -0200
committerSascha Hauer <s.hauer@pengutronix.de>2012-03-02 08:47:49 +0100
commit3ac804e31199c55440a423c76068d693b37fd50b (patch)
tree8ba4f2130b8f52853ba8a7cbbf19b5e0e7c6b467 /arch/arm/plat-mxc
parentd65b4e98d7ea3038b767b70fe8be959b2913f16d (diff)
downloadop-kernel-dev-3ac804e31199c55440a423c76068d693b37fd50b.zip
op-kernel-dev-3ac804e31199c55440a423c76068d693b37fd50b.tar.gz
ARM: mx3: Let mx31 and mx35 enter in LPM mode in WFI
The LPM field of register CCMR is used to select the mode that the processor will run when it goes to WFI. When mx31 enters in WFI mode the LPM field is at its reset value of 0, which configures the mx31 to enter in "wait mode". On mx35, the LPM field on mx35 is also at 0 after reset, which corresponds to "run mode" instead of "wait mode". Instead of relying on the reset value of LPM to set the low power mode for WFI, configure mx31 and mx35 to run in "wait mode" Reported-by: Benoit Thebaudeau <benoit.thebaudeau@advansee.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/plat-mxc')
-rw-r--r--arch/arm/plat-mxc/include/mach/common.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index 1bf0df8..06595a3 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -84,6 +84,14 @@ enum mxc_cpu_pwr_mode {
STOP_POWER_OFF, /* STOP + SRPG */
};
+enum mx3_cpu_pwr_mode {
+ MX3_RUN,
+ MX3_WAIT,
+ MX3_DOZE,
+ MX3_SLEEP,
+};
+
+extern void mx3_cpu_lp_set(enum mx3_cpu_pwr_mode mode);
extern void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode);
extern void imx_print_silicon_rev(const char *cpu, int srev);
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