diff options
| author | Fabio Estevam <fabio.estevam@freescale.com> | 2010-12-06 16:38:32 -0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2010-12-07 20:03:11 +0100 |
| commit | 8c2efec3cd5fcc6240da8931222ccab556a40ff3 (patch) | |
| tree | 01640b908b69dbaf6f681f5308406ade1917c8e7 /arch/arm/plat-mxc/include | |
| parent | 0e44e059588e1d91f3a1974d2ce3348864d1d799 (diff) | |
| download | op-kernel-dev-8c2efec3cd5fcc6240da8931222ccab556a40ff3.zip op-kernel-dev-8c2efec3cd5fcc6240da8931222ccab556a40ff3.tar.gz | |
ARM: mx5: add support for the two watchdog modules
MX51 has two watchdog modules.
Add support for both of them.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/plat-mxc/include')
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/devices-common.h | 1 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/mx51.h | 2 |
2 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index 3640eaf..8658c9c 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h @@ -67,6 +67,7 @@ struct platform_device *__init imx_add_imx21_hcd( const struct mx21_usbh_platform_data *pdata); struct imx_imx2_wdt_data { + int id; resource_size_t iobase; resource_size_t iosize; }; diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h index 8fddfef..882f1f4 100644 --- a/arch/arm/plat-mxc/include/mach/mx51.h +++ b/arch/arm/plat-mxc/include/mach/mx51.h @@ -61,7 +61,7 @@ #define MX51_GPIO3_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x8c000) #define MX51_GPIO4_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x90000) #define MX51_KPP_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x94000) -#define MX51_WDOG_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x98000) +#define MX51_WDOG1_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x98000) #define MX51_WDOG2_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x9c000) #define MX51_GPT1_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0xa0000) #define MX51_SRTC_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0xa4000) |
