diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-07-31 14:20:16 +0100 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-07-31 14:20:16 +0100 |
commit | 7b70c4275f28702b76b273c8534c38f8313812e9 (patch) | |
tree | 1df2229ca02466bd1adda814ac5c37aa0a597db1 /arch/arm/plat-mxc/include/mach/mx35.h | |
parent | ceb0885d3b01bb2e2f18765770e212914f2864be (diff) | |
parent | a20df564d15bd28e3df24e1c65b885bd74d23f17 (diff) | |
download | op-kernel-dev-7b70c4275f28702b76b273c8534c38f8313812e9.zip op-kernel-dev-7b70c4275f28702b76b273c8534c38f8313812e9.tar.gz |
Merge branch 'devel-stable' into devel
Conflicts:
arch/arm/kernel/entry-armv.S
arch/arm/kernel/setup.c
arch/arm/mm/init.c
Diffstat (limited to 'arch/arm/plat-mxc/include/mach/mx35.h')
-rw-r--r-- | arch/arm/plat-mxc/include/mach/mx35.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h index 526a558..af3038c 100644 --- a/arch/arm/plat-mxc/include/mach/mx35.h +++ b/arch/arm/plat-mxc/include/mach/mx35.h @@ -18,7 +18,7 @@ #define MX35_ETB_SLOT4_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x10000) #define MX35_ETB_SLOT5_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x14000) #define MX35_ECT_CTIO_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x18000) -#define MX35_I2C_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x80000) +#define MX35_I2C1_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x80000) #define MX35_I2C3_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x84000) #define MX35_UART1_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x90000) #define MX35_UART2_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x94000) @@ -60,6 +60,8 @@ #define MX35_RTC_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xd8000) #define MX35_WDOG_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xdc000) #define MX35_PWM_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xe0000) +#define MX35_CAN1_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xe4000) +#define MX35_CAN2_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xe8000) #define MX35_RTIC_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xec000) #define MX35_OTG_BASE_ADDR 0x53ff4000 @@ -123,7 +125,7 @@ #define MX35_INT_MMC_SDHC1 7 #define MX35_INT_MMC_SDHC2 8 #define MX35_INT_MMC_SDHC3 9 -#define MX35_INT_I2C 10 +#define MX35_INT_I2C1 10 #define MX35_INT_SSI1 11 #define MX35_INT_SSI2 12 #define MX35_INT_CSPI2 13 |