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author | Jiri Kosina <jkosina@suse.cz> | 2010-08-04 15:14:38 +0200 |
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committer | Jiri Kosina <jkosina@suse.cz> | 2010-08-04 15:14:38 +0200 |
commit | d790d4d583aeaed9fc6f8a9f4d9f8ce6b1c15c7f (patch) | |
tree | 854ab394486288d40fa8179cbfaf66e8bdc44b0f /arch/arm/plat-mxc/include/mach/mx35.h | |
parent | 73b2c7165b76b20eb1290e7efebc33cfd21db1ca (diff) | |
parent | 3a09b1be53d23df780a0cd0e4087a05e2ca4a00c (diff) | |
download | op-kernel-dev-d790d4d583aeaed9fc6f8a9f4d9f8ce6b1c15c7f.zip op-kernel-dev-d790d4d583aeaed9fc6f8a9f4d9f8ce6b1c15c7f.tar.gz |
Merge branch 'master' into for-next
Diffstat (limited to 'arch/arm/plat-mxc/include/mach/mx35.h')
-rw-r--r-- | arch/arm/plat-mxc/include/mach/mx35.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h index 526a558..af3038c 100644 --- a/arch/arm/plat-mxc/include/mach/mx35.h +++ b/arch/arm/plat-mxc/include/mach/mx35.h @@ -18,7 +18,7 @@ #define MX35_ETB_SLOT4_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x10000) #define MX35_ETB_SLOT5_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x14000) #define MX35_ECT_CTIO_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x18000) -#define MX35_I2C_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x80000) +#define MX35_I2C1_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x80000) #define MX35_I2C3_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x84000) #define MX35_UART1_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x90000) #define MX35_UART2_BASE_ADDR (MX35_AIPS1_BASE_ADDR + 0x94000) @@ -60,6 +60,8 @@ #define MX35_RTC_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xd8000) #define MX35_WDOG_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xdc000) #define MX35_PWM_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xe0000) +#define MX35_CAN1_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xe4000) +#define MX35_CAN2_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xe8000) #define MX35_RTIC_BASE_ADDR (MX35_AIPS2_BASE_ADDR + 0xec000) #define MX35_OTG_BASE_ADDR 0x53ff4000 @@ -123,7 +125,7 @@ #define MX35_INT_MMC_SDHC1 7 #define MX35_INT_MMC_SDHC2 8 #define MX35_INT_MMC_SDHC3 9 -#define MX35_INT_I2C 10 +#define MX35_INT_I2C1 10 #define MX35_INT_SSI1 11 #define MX35_INT_SSI2 12 #define MX35_INT_CSPI2 13 |