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| author | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2010-01-07 11:27:17 +0100 |
|---|---|---|
| committer | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2010-01-08 16:45:24 +0100 |
| commit | a8dfb6462a033984b99fee4122fe0799a31f5bb4 (patch) | |
| tree | bc71dbed2b59a897d1f5f90b541fc7d0f6b4ae48 /arch/arm/plat-mxc/include/mach/mx27.h | |
| parent | 3cdd54417d0f821825a353f7273d356399112f56 (diff) | |
| download | op-kernel-dev-a8dfb6462a033984b99fee4122fe0799a31f5bb4.zip op-kernel-dev-a8dfb6462a033984b99fee4122fe0799a31f5bb4.tar.gz | |
imx: define functions to configure chip selects in the WEIM
This has the addional effect that the macros CSCR_U, CSCR_L and CSCR_A
are not used anymore in mach-pcm038.c and mach-qong.c. These still use
the deprecated IO_ADDRESS macro and shouldn't be used in new code.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Holger Schurig <hs4233@mail.mn-solutions.de>
Cc: Dmitriy Taychenachev <dimichxp@gmail.com>
Diffstat (limited to 'arch/arm/plat-mxc/include/mach/mx27.h')
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/mx27.h | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/plat-mxc/include/mach/mx27.h index 832b580..bae9cd7 100644 --- a/arch/arm/plat-mxc/include/mach/mx27.h +++ b/arch/arm/plat-mxc/include/mach/mx27.h @@ -24,6 +24,10 @@ #ifndef __MACH_MX27_H__ #define __MACH_MX27_H__ +#ifndef __ASSEMBLER__ +#include <linux/io.h> +#endif + #define MX27_AIPI_BASE_ADDR 0x10000000 #define MX27_AIPI_BASE_ADDR_VIRT 0xf4000000 #define MX27_AIPI_SIZE SZ_1M @@ -109,6 +113,11 @@ #define MX27_M3IF_BASE_ADDR (MX27_X_MEMC_BASE_ADDR + 0x3000) #define MX27_PCMCIA_CTL_BASE_ADDR (MX27_X_MEMC_BASE_ADDR + 0x4000) +#define MX27_WEIM_CSCRx_BASE_ADDR(cs) (MX27_WEIM_BASE_ADDR + (cs) * 0x10) +#define MX27_WEIM_CSCRxU(cs) (MX27_WEIM_CSCRx_BASE_ADDR(cs)) +#define MX27_WEIM_CSCRxL(cs) (MX27_WEIM_CSCRx_BASE_ADDR(cs) + 0x4) +#define MX27_WEIM_CSCRxA(cs) (MX27_WEIM_CSCRx_BASE_ADDR(cs) + 0x8) + #define MX27_PCMCIA_MEM_BASE_ADDR 0xdc000000 /* IRAM */ @@ -119,6 +128,16 @@ IMX_IO_ADDRESS(x, MX27_SAHB1) ?: \ IMX_IO_ADDRESS(x, MX27_X_MEMC)) +#ifndef __ASSEMBLER__ +static inline void mx27_setup_weimcs(size_t cs, + unsigned upper, unsigned lower, unsigned addional) +{ + __raw_writel(upper, MX27_IO_ADDRESS(MX27_WEIM_CSCRxU(cs))); + __raw_writel(lower, MX27_IO_ADDRESS(MX27_WEIM_CSCRxL(cs))); + __raw_writel(addional, MX27_IO_ADDRESS(MX27_WEIM_CSCRxA(cs))); +} +#endif + /* fixed interrupt numbers */ #define MX27_INT_I2C2 1 #define MX27_INT_GPT6 2 |
