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| author | David S. Miller <davem@davemloft.net> | 2012-02-26 21:55:51 -0500 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2012-02-26 21:55:51 -0500 |
| commit | ff4783ce78c08d2990126ce1874250ae8e72bbd2 (patch) | |
| tree | 5c95885a4ab768101dd72942b57c238d452a7565 /arch/arm/mm | |
| parent | 622121719934f60378279eb440d3cec2fc3176d2 (diff) | |
| parent | 203738e548cefc3fc3c2f73a9063176c9f3583d5 (diff) | |
| download | op-kernel-dev-ff4783ce78c08d2990126ce1874250ae8e72bbd2.zip op-kernel-dev-ff4783ce78c08d2990126ce1874250ae8e72bbd2.tar.gz | |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Conflicts:
drivers/net/ethernet/sfc/rx.c
Overlapping changes in drivers/net/ethernet/sfc/rx.c, one to change
the rx_buf->is_page boolean into a set of u16 flags, and another to
adjust how ->ip_summed is initialized.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/arm/mm')
| -rw-r--r-- | arch/arm/mm/Kconfig | 3 | ||||
| -rw-r--r-- | arch/arm/mm/cache-v7.S | 2 |
2 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 1a3ca24..7edef91 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -631,7 +631,8 @@ comment "Processor Features" config ARM_LPAE bool "Support for the Large Physical Address Extension" - depends on MMU && CPU_V7 + depends on MMU && CPU_32v7 && !CPU_32v6 && !CPU_32v5 && \ + !CPU_32v4 && !CPU_32v3 help Say Y if you have an ARMv7 processor supporting the LPAE page table format and you would like to access memory beyond the diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S index 7a24d39..a655d3d 100644 --- a/arch/arm/mm/cache-v7.S +++ b/arch/arm/mm/cache-v7.S @@ -55,7 +55,7 @@ loop1: cmp r1, #2 @ see what cache we have at this level blt skip @ skip if no cache, or just i-cache #ifdef CONFIG_PREEMPT - save_and_disable_irqs r9 @ make cssr&csidr read atomic + save_and_disable_irqs_notrace r9 @ make cssr&csidr read atomic #endif mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr isb @ isb to sych the new cssr&csidr |
